MC5400 Search Results

MC7479F

Abstract: MC7479 MC5479 BA 811 MC5479F diagram pulsa
Contextual Info: / D U A L T Y P E D F L IP - F L O P M T T L MC5400F/7400F series M C 5 4 7 9 F* M C 7 4 7 9 F* T h is dual type 0 flip -flo p triggers o n the posi­ tive edge o f the c lo c k input. D u r in g the clock transition the state o f th e D in p u t is transferred

MC7400P

Abstract: MC7400 MC5400L MC5400 5D-9 M0400
Contextual Info: jfq u a d 2- i n p u t -N A N O " GATE~\1 MTTL MC7400P series MTTL MC5400L/7400L series MC5400L* MC7400P,L* T his device consists o f fo u r 2 -in p u t N A N D sates. Each gate m ay be used as an inverter, o r tw o gates m ay be cross-coupled t o form bistable circuits.

MC7400

Abstract: MC5400F MC7400F MC5400
Contextual Info: Mî t L MC5400F/7400F series Q U A D 2-IN PU T " N A N D " G A T E MC5400F* MC7400F* I 1 / 4 O F C I R C U I T SH O W N This device consists of four 2-input N A N O gates. Each gate m ay be used as an inverter, or tw o gates may be cross-coupled to form bistable circuits.

MC5430

Abstract: MC7430P MC5430L MC7400P MC7430
Contextual Info: M TTL MC7400P series M TTL MC5400L/7400L series 0-INPUT "N A N D " GATE r MC5430L* MC7430P,L* T his device i& an 8 -in p u t NAND gate. It is useful w hen processing a large num ber o f variables, such as in en c o d ers and decoders. I 7777/ 777\ < P o s itiv « Logic:

Contextual Info: Q UAD 2-INPUT "N A N D ” GATE W ITH OPEN COLLECTOR MTTL MC5400F/7400F series MC5401F* MC7401F* 1 / 4 O F C IR C U IT S H O W N This device consists of four 2-input N A N D gales with no output pullup network. It can be used where the Wired-OR function is required, or for driving dis>

Contextual Info: JD D U A L «-IN P U T " N A N O " G A T E M T T L MC5400F/7400F series MC5420F* MC7420F* I 1 / 2 O F C IR C U IT SH O W N * This device consists of two 4-input N A N O gates. These gates may be cross-coupled to form a set-reset flip-flop. P ositive L og ic: a - 1 • 1 2 • 1 3 • 14

Contextual Info: / D U A L 4-1NPUT "N A N O " B U FFER MTTL MC5400F/7400F series ] I MC5440F * MC7440F * This device consists of two 4-input N A N O power gate circuits. Each gate is designed for driving high fan-out loads <30 . 1/2 O F C IR C U IT SHOWN P ositiva L o g ic : 2 » 1 • 1 2 • 1 3 • 14

Contextual Info: C M T T L MC5400F/7400F series DUAL J-K FLIP-FLOP MC5473F* MC7473F* J 14— C LO C K 1 -< This negative-edge-clocked dual J-K flip-flop operates on the masterslave principle. The device is quite useful for simple registers and count­ ers where multiple J and K inputs are not required.

Contextual Info: MTTL MC5400/7400 series HEX IN V E R TE R Open Collector M O TO R O LA MC5405 • MC7405 A P R IL 1971 A d d S u f f i x F f o r T O - 8 6 c e r a m i c p a c k a g e ( C a se 6 0 7 ) . S u f f i x L f o r T O - 1 1 6 c e r a m i c p a c k a g e ( Ca se 6 3 2 ) .

Contextual Info: / D U A L 2-W IDE 2-IN P U T "A N D -O R -IN V E R T " G A T E M T T L MC5400F/7400F series | V. MC5451F* MC7451F* 1 /2 O F CIRCU IT SHOWN This device co n sists o f tw o AND O R IN V ER T gates. Each gate is m ade u p o f tw o 2 -in p u t AND gates O R ed to g eth er and inverted.

MC5400F

Abstract: MC5460 MC5460F MC7460 MC7460F 7400F MC5450 7453
Contextual Info: D ou/ U A L 4-IN PU T E X P A N D E R \ FO R ",AND-OR I N V E R T " G A T E S \ M TTL MC5400F/7400F series MC5460F* MC7460F* I I / 2 0 F C IR C U IT SHO W N T h is device consists of two 4-input O R expanders for use w ith the A N D -O R -IN V E R T gates. A maxi­

mc5400f

Abstract: MC5453 coa 6 pins IC MC5453F MC7453 MC7453F
Contextual Info: y EXZ D ^ N v EWR?“ r EUT\ M T T L MC5400F/7400F series MC5453F* MC7453F* T h i s d e v ic e c o n s i s t s o f f o u r 2 i n p u t A N D g a t e s O R e d to ge th e r and in v e r t e d Up to fo u r M C5480/7460 e x p a n d e r g a t e s m a y b e O R e d w it h t h e d e v ic e a t t h e

MC5400F

Abstract: C5450
Contextual Info: I DUAL41NPU TEXPAN DER / F O R "A N D -O R I N V E R T " G A T E S \ M TTL MC5400F/7400F series MC5460F* MC7460F* I This device consists of two 4-input O R expanders for use with the A N D - O R - IN V E R T gates. A maxi­ mum of four expander gates can be added to the

Contextual Info: D U A L 2-WIDE 2-IN PU T 'A N D -O R -IN V E R T ” G A T E MC5451FMC7451F* \ M T T L MC5400F/7400F series T h is 1 /2 O F C I R C U I T S H O W N d e v ice c o n sists o f tw o A N D O R I N V E R T gates. Ea ch gate is m ade u p o f tw o 2 -in p u t A N D gates

Contextual Info: / D U A L T Y P E D F L IP -F L O P M T T L MC5400F/7400F series MC5479F* MC7479F* This dual type 0 flip-flop triggers on the posi­ tive edge of the clock input. During the clock transition the state of the D input is transferred to the Q output. The device is useful in shift

Contextual Info: M TTL MC5400/7400 series QUAD LATCH MC5475 MC9375 MC5477 MC9377 • • • • MC7475 MC8375 MC7477 MC8377 MOTOROLA u 0 0 4 4 7 6 •cl d S u f f i x F f o r 1 4 - p i n c e r a m i c p a c k a g e ; C.J a s *• > J 0 7 M C 5 4 7 V • 7 4 7 7, M C 9 3 7 V . 8 3 7 7.

MC7404

Abstract: CI 7400 MC5404 CT-07
Contextual Info: MTTL MC5400/7400 series M OTO ROLA HEX IN V ER T ER MC5404 • MC7404 ISS UE A x 004468 Al A d d S u f f i x F f o r T O -86 c e r a m ic p a c k a g e C a s e 6 0 7 . S u f f i x L f o r T O - 1 1 6 c e r a m ic p a c k a g e (C a s e 6 3 2 ) . S u f f i x P f o r T O - 1 1 6 p la s tic p a c k a g e (C a s e 6 4 6 ) M C 7 4 0 4 o n ly .

mc7440p

Abstract: MC7400P MC5400L MC5440 MC5440L MC7440
Contextual Info: OU A L 4-INPUT "N A N D " BUFFER \ M T T L MC7400P series M T T L MC5400L/7400L series MC5440L * MC7440P,L* 1 This device consists off two 4-input N A N D power gate circuits. Each gate is designed for driving high fan-out loads 30 . 1 /2 O F C I R C U I T S H O W N

MC5473F

Abstract: MC7473F MC7473 7400F MC5473 MC747
Contextual Info: \ □U A L J-K FLIP-FLOP M TTL MC5400F/7400F series M C5473F* M C7473F* T h is negative-edge-clocked dua l J -K flip -flo p operates o n the m aster­ 14 — C LO C K 1 -< K 3— R ESE T *n Q — 13 2 -7— Q —9 K 10 — S —8 J slave principle. T h e device is q u ite useful fo r sim p le registers a n d c o u n t ­

Contextual Info: 8-INPUT "NAN D" GA TE \ MTTL MC5400F/7400F series MC5430F* MC7430F* T h is device is an 8-input N A N D gate. It is useful when processing a large number of variables, such as in encoders and decoders. Positive Logic 12 - 2 - 3~. S T 6 - 7 • 8 - 9 • 10

Contextual Info: C aUAD 2-INPUT "N O R " GATE MTTL MC5400F/7400F series MC5402F* MC7402F * 1/4 OF CIRCUIT SHOWN 4 k l 4 k § This device consists o f fo u r 2 -in p u t NOR gates. Each gate m ay be used as an inverter, o r tw o gates m ay be cross-coupled to fo rm bistable circuits.

IC 7438

Abstract: ms - 7437
Contextual Info: MTTL MC5400/7400 Series A QUAD 2-INPUT POSITIVE "NA N D"BU FFER S MC 543 7 -MC 743 7 M C 5438• MC7438 Add S u f f ix F f o r T O 8 6 ce ra m ic package S u f f i x L f o r T O - 1 1 6 c e r a m i c p a c k a g e iC;-: S u f f i x P f o r T O - 1 1 6 p l a s t i c p a c k age i C .;js*

Contextual Info: J' Q U A D 2 -IN PU T "N A N D " G A T E ] MTTL MC5400F/7400F series MC5400F* MC7400F* I 1/4 O F C IR C U IT SHOWN T h is device consists of four 2-input N A N D gates. Each gate may be used as an inverter, or two gates may be cross-coupled to form bistable circuits.

MC7472

Contextual Info: C M T T L MC5400F/7400F series J-K F L IP -F L O P MC5472F* MC7472F* T h is negative-edge-clocked J-K flip-flop operates on the master-slave principle. Three K inputs are A N D ed together, and three J inputs we A N D e d together. S E T and R E S E T inputs are also available. The device