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    PAXONET COMMUNICATIONS Search Results

    PAXONET COMMUNICATIONS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TP82530-6
    		Rochester Electronics LLC 82530 - Serial Communication Controller PDF Buy
    TMS9900JDL
    		Rochester Electronics LLC TMS9900 - RISC Communications Controller, 16-Bit PDF Buy
    8251A/BXA
    		Rochester Electronics LLC 8251 - Programmable Communication Interface, NMOS, CDIP28 PDF Buy
    TSL1401CCS-RL2
    		Rochester Electronics LLC TSL1401 - 128 x 1 Linear Sensor Array with hold. Please note, an MOQ and OM of 250 pcs applies. PDF Buy
    COMBOSOLAR
    		Texas Instruments AFE031 Powerline Communications Analog Front End Visit Texas Instruments

    PAXONET COMMUNICATIONS Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    vhdl code for frame synchronization

    Abstract: vhdl HDB3 vhdl code g704 digital alarm clock vhdl code in modelsim G732 Paxonet Communications verilog code for frame synchronization crc verilog code 16 bit E1 frame alarm clock design of digital VHDL
    Contextual Info: CoreEl CC303 Framer May 30, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications, Inc. 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com Features • •


    Original     		CC303 vhdl code for frame synchronization vhdl HDB3 vhdl code g704 digital alarm clock vhdl code in modelsim G732 Paxonet Communications verilog code for frame synchronization crc verilog code 16 bit E1 frame alarm clock design of digital VHDL PDF

    fpga vhdl code for crc-32

    Abstract: crc verilog code 16 bit verilog code for 10 gb ethernet verilog code for frame synchronization sonet testbench XC2VP20 vhdl code scrambler STM 64 FRAMER WITH OTN vhdl code stm-64 CRC-16
    Contextual Info: CoreEl CC327 10Gb GFP Framer May 6, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications, Inc. 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com Features


    Original     		CC327 OC-192 fpga vhdl code for crc-32 crc verilog code 16 bit verilog code for 10 gb ethernet verilog code for frame synchronization sonet testbench XC2VP20 vhdl code scrambler STM 64 FRAMER WITH OTN vhdl code stm-64 CRC-16 PDF

    CC-401

    Abstract: XIP209 XIP210 verilog code for spi4.2 interface
    Contextual Info: CoreEl SPI-4 Phase 2 Interface Core CC401 May 6, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications, Inc. 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com


    Original     		CC401) OIF-SPI402 OC-192, CC401 CC410 CC-401 XIP209 XIP210 verilog code for spi4.2 interface PDF

    cc143

    Abstract: simple powerful charge controller block diagram scrambler
    Contextual Info: CoreEl - CC200 ATM Cell Processor May 6, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications, Inc. 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com Features


    Original     		CC200 disc2277 cc143 simple powerful charge controller block diagram scrambler PDF

    GR-253

    Abstract: XIP211 XIP2198 STS-192 vhdl code for frame synchronization Paxonet Communications
    Contextual Info: CoreEl STS192c/STM64 Path Processor CC324 May 6, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com


    Original     		STS192c/STM64 CC324) GR-253, CC324 GR-253 XIP211 XIP2198 STS-192 vhdl code for frame synchronization Paxonet Communications PDF

    vhdl code for pcm bit stream generator

    Abstract: CC302 alarm clock design of digital VHDL v55e digital alarm clock vhdl code in modelsim bipolar ami verilog code for frame assembler alarm clock verilog code
    Contextual Info: CoreEl T1 Framer CC302 May 30, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications, Inc. 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com Features •


    Original     		CC302) 7041/Y vhdl code for pcm bit stream generator CC302 alarm clock design of digital VHDL v55e digital alarm clock vhdl code in modelsim bipolar ami verilog code for frame assembler alarm clock verilog code PDF

    vhdl code for mac transmitter

    Abstract: verilog code CRC generated ethernet packet XIP2177 XIP2178 CRC SOURCE CODE IN VHDL Cyclic Redundancy Check simulation IMPLEMENTATION OF IEEE 802.3 MAC TRANSMITTER USING VHDL
    Contextual Info: CoreEl 10Gb Ethernet MAC CC410 May 6, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications, Inc. 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com Features


    Original     		CC410) OC-192c vhdl code for mac transmitter verilog code CRC generated ethernet packet XIP2177 XIP2178 CRC SOURCE CODE IN VHDL Cyclic Redundancy Check simulation IMPLEMENTATION OF IEEE 802.3 MAC TRANSMITTER USING VHDL PDF

    CC321

    Contextual Info: CoreEl OC12c Path Processor CC321 May 30, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications, Inc. 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com


    Original     		OC12c CC321) STS-12c Bellcore-253 20A\h CC321 PDF

    verilog code for 10 gb ethernet

    Abstract: 8B10B CRC16 CRC-16 verilog code for frame synchronization CRC-16 and verilog XC2V250-5
    Contextual Info: CoreEl 8-Bit Transparent GFP Framer CC124 May 30, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications, Inc. 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com


    Original     		CC124) verilog code for 10 gb ethernet 8B10B CRC16 CRC-16 verilog code for frame synchronization CRC-16 and verilog XC2V250-5 PDF

    lEXRA lx5280

    Abstract: Inventra M8051 Warp lx5280 8259 Programmable Interrupt Controller microcontroller 8052 m8051 warp gsm coding for 8051 microcontroller dvb-RCS internet Arasan interfacing 8051 with 300 GSM Modem datasheet
    Contextual Info: Intellectual Property Selector Guide IP Building Blocks for System-on-a-ProgrammableChip Solutions March 2001 Contents 2 Introduction to Altera Megafunctions 4 Signal Processing Megafunctions 7 Communications Megafunctions 10 PCI & Other Bus Interface Megafunctions


    Original     		M-SG-IP-01 lEXRA lx5280 Inventra M8051 Warp lx5280 8259 Programmable Interrupt Controller microcontroller 8052 m8051 warp gsm coding for 8051 microcontroller dvb-RCS internet Arasan interfacing 8051 with 300 GSM Modem datasheet PDF

    CRC-16 and verilog

    Abstract: vhdl code scrambler CRC-16 CRC-32 OTN SWITCH header G.7041 GFP XC2V500-5 CRC-16 and CRC-32 Ethernet
    Contextual Info: CoreEl 8-Bit Multichannel GFP Framer CC225 May 30, 2003 Product Specification AllianceCORE™ Facts Core Specifics See Table 1 Provided with Core Documentation CC225 Functional Specification Design File Formats EDIF netlist Constraints File .ucf Script Based Behavioral


    Original     		CC225) CC225 apCC225 CRC-16 and verilog vhdl code scrambler CRC-16 CRC-32 OTN SWITCH header G.7041 GFP XC2V500-5 CRC-16 and CRC-32 Ethernet PDF

    CC226

    Abstract: simple powerful charge controller block diagram vhdl code for 8-bit calculator register based fifo xilinx crc verilog code 16 bit vhdl code for scrambler descrambler CRC-16 CRC-32 rx data path interface in vhdl vhdl code CRC32
    Contextual Info: CoreEl 2.5 Gb/s GFP Framer CC226 May 30, 2003 Product Specification AllianceCORE™ Facts Core Specifics See Table 1 Provided with Core Documentation Functional Specification Design File Formats EDIF netlist Constraints File .ucf Script Based Behavioral


    Original     		CC226) CC226 simple powerful charge controller block diagram vhdl code for 8-bit calculator register based fifo xilinx crc verilog code 16 bit vhdl code for scrambler descrambler CRC-16 CRC-32 rx data path interface in vhdl vhdl code CRC32 PDF

    4046

    Abstract: roshni 4046 application CRC-16 and CRC-32 POS-PHY ATM format DATASHEET 4046 CRC-32 OC48 PX4805 STS-48
    Contextual Info: PX4805 - Roshni Dual OC-48 Framer & ATM/POS Processor Overview Roshni PX4805 is a highly integrated, low power Dual OC-48 SONET/SDH physical layer device, which performs Transmission Convergence functionality for ATM and Packet Over SONET POS . Each independent OC-48 slice provides three modes of operation – a single OC-48 2.4 Gbps stream, a single OC12 622 Mbps stream, and four 622 Mbps streams multiplexed onto the OC-48 line. Roshni interfaces to the


    Original     		PX4805 OC-48 OC-192 4046 roshni 4046 application CRC-16 and CRC-32 POS-PHY ATM format DATASHEET 4046 CRC-32 OC48 STS-48 PDF

    OTU1

    Abstract: XIP2174 Paxonet Communications OC48 ISE4 OTN testbench
    Contextual Info: STS48 OTN Framer/Digital Wrapper CC381 July 9, 2002 Product Specification AllianceCORE Facts Provided with Core Documentation User Guide, Design Guide EDIF netlist Design File Formats Constraints File cc381.ucf Testbench, test scripts Verification Tool


    Original     		STS48 CC381) cc381 OTU1 XIP2174 Paxonet Communications OC48 ISE4 OTN testbench PDF

    OTU2 framer

    Abstract: verilog code for TCM decoder 8 BIT PROCESSOR USING VHDL
    Contextual Info: CoreEl CC481 OTU2 Framer May 6, 2003 Product Specification AllianceCORE™ Facts separately Core Specifics See Table 1 Provided with Core Documentation User Guide, Design Guide EDIF netlist, NGC netlist Design File Formats Constraints Files cc481chp.ucf, cc481_wrap.ucf


    Original     		CC481 cc481chp OTU2 framer verilog code for TCM decoder 8 BIT PROCESSOR USING VHDL PDF

    rx data path interface in vhdl

    Abstract: vhdl code for 8-bit calculator CRC-16 CRC-32 STS-48 CC226 x431 fpga vhdl code for crc-32 CRC-16 and verilog vhdl code for scrambler descrambler
    Contextual Info: CoreEl 1.25 Gb/s GFP Framer CC224 May 30, 2003 Product Specification AllianceCORE™ Facts Core Specifics See Table 1 Provided with Core Documentation CC224 Functional Specification Design File Formats EDIF netlist Constraints File .ucf Script Based Behavioral


    Original     		CC224) CC224 apCC224 rx data path interface in vhdl vhdl code for 8-bit calculator CRC-16 CRC-32 STS-48 CC226 x431 fpga vhdl code for crc-32 CRC-16 and verilog vhdl code for scrambler descrambler PDF

    roshni

    Abstract: POS-PHY ATM format CRC-16 CRC-32 OC48 PX4805 STS-48 CRC-16 and CRC-32
    Contextual Info: Roshni: Product Brief MetroConnect ROSHNI PRODUCT BRIEF DUAL OC-48 FRAMER & ATM/POS PROCESSOR 4046 Clipper Court Fremont, CA 94538 Tel: 510 770-2277 Fax: (510) 770-2288 Email: sales@paxonet.com URL: www.paxonet.com May-2001 Page 1 of 8 Roshni: Product Brief


    Original     		OC-48 May-2001 PX4805 OC-12 roshni POS-PHY ATM format CRC-16 CRC-32 OC48 STS-48 CRC-16 and CRC-32 PDF

    64b/66b encoder

    Abstract: CRC-32 GR-253 P802
    Contextual Info: Decathlon: Product Brief MetroConnect DECATHLON PRODUCT BRIEF 10 GIGABIT ETHERNET AND OC-192 SONET/SDH TRANSPORT DEVICE 4046 Clipper Court Fremont, CA 94538 Tel: 510 770-2277 Fax: (510) 770-2288 Email: sales@paxonet.com URL: www.paxonet.com January-2002


    Original     		OC-192 January-2002 64B/66B 10-Gigabit 10GbE 64b/66b encoder CRC-32 GR-253 P802 PDF

    XIP2173

    Abstract: DCM-1 dcm11 error correction code in vhdl verilog implementation of error correcting code application of optical encoder Reed-Solomon Decoder verilog code XC2V500-5 CC345
    Contextual Info: G.709-Compliant FEC Core CC345 July 9, 2002 Product Specification AllianceCORE Facts Provided with Core Documentation User Guide, Design Guide EDIF netlist Design File Formats Constraints File cc345.ucf Testbench, test scripts Verification Tool Instantiation Templates


    Original     		709-Compliant CC345) cc345 XIP2173 DCM-1 dcm11 error correction code in vhdl verilog implementation of error correcting code application of optical encoder Reed-Solomon Decoder verilog code XC2V500-5 PDF

    OTN testbench

    Abstract: CC481 XIP2196 OTU2 framer OC48 STS192 XILINX vhdl code REED SOLOMON encoder decoder vhdl code for bram Generic AIS verilog code for TCM decoder
    Contextual Info: STS192 OTN Framer/Digital Wrapper CC481 July 9, 2002 Product Specification AllianceCORE Facts Provided with Core Documentation User Guide, Design Guide EDIF netlist Design File Formats Constraints File cc481.ucf Testbench, test scripts Verification Tool


    Original     		STS192 CC481) cc481 OTN testbench XIP2196 OTU2 framer OC48 XILINX vhdl code REED SOLOMON encoder decoder vhdl code for bram Generic AIS verilog code for TCM decoder PDF

    80C31 instruction set

    Abstract: xc2s200 pq208 xilinx code for 8-bit serial adder dvb-RCS transmitter XC2S50 driver PIC Microcontroller GSM Modem POS-PHY ATM format dvb-RCS modulator uart 16450 128-bit key generation matlab code for image enc
    Contextual Info: XILINX IP SELECTION GUIDE Implementation Example Function Communication & Networking BUFE-based Multiplexer Slice 3G FEC Package 3GPP Compliant Turbo Convolutional Decoder 3GPP Compliant Turbo Convolutional Encoder 3GPP Turbo Decoder 8b/10b Decoder 8b/10b Encoder


    Original     		8b/10b DO-DI-ADPCM32) DO-DI-ADPCM64) CC-201) CC-200) CRC10 CC-130) CRC32 CC-131) 80C31 instruction set xc2s200 pq208 xilinx code for 8-bit serial adder dvb-RCS transmitter XC2S50 driver PIC Microcontroller GSM Modem POS-PHY ATM format dvb-RCS modulator uart 16450 128-bit key generation matlab code for image enc PDF

    vhdl code for ofdm transceiver using QPSK

    Abstract: soft 16 QAM modulation matlab code verilog code for ofdm transmitter dac 0808 interfacing with 8051 microcontroller vhdl code for ofdm transmitter VHDL PROGRAM for ofdm turbo codes matlab simulation program 16 QAM adaptive modulation matlab E1 pdh vhdl uart 16750
    Contextual Info: Intellectual Property Selector Guide IP Functions for System-on-a-Programmable-Chip Solutions March 2003 Contents • Introduction to Altera IP Megafunctions Page 3 • DSP Solutions Page 5 • Communications Solutions Page 11 • Microsystems Solutions Page 16


    Original     		ARM922T vhdl code for ofdm transceiver using QPSK soft 16 QAM modulation matlab code verilog code for ofdm transmitter dac 0808 interfacing with 8051 microcontroller vhdl code for ofdm transmitter VHDL PROGRAM for ofdm turbo codes matlab simulation program 16 QAM adaptive modulation matlab E1 pdh vhdl uart 16750 PDF

    digital cross connect

    Abstract: 7486 motorola single stage grooming pll 4046
    Contextual Info: Viti-48 SONET/SDH Tributary Digital Cross Connect Features • A single stage, non-blocking time switch for cross-connecting virtual tributaries VTs or tributary units (TUs) with an aggregate bandwidth of 2488 Mbps • Provides for cross-connection across sixteen


    Original     		Viti-48 STS-12/STM-4 x-200 digital cross connect 7486 motorola single stage grooming pll 4046 PDF

    80C31 instruction set

    Abstract: XC2S200 pq208 xilinx fifo generator 6.2 application of 8259 microcontroller design BCD adder pal dvb-RCS modem hitachi pbx AX1610 MC68000 opcodes adder xilinx
    Contextual Info: Vendor Name IP Type Xilinx Xilinx Xilinx sysonchip Xilinx Xilinx Amphion Amphion Amphion Amphion Amphion Xilinx Xilinx NewLogic LogiCORE LogiCORE LogiCORE AllianceCORE LogiCORE LogiCORE AllianceCORE AllianceCORE AllianceCORE AllianceCORE AllianceCORE LogiCORE


    Original     		8b/10b DO-DI-ADPCM32) DO-DI-ADPCM64) CC-201) CC-200) CRC10 CC-130) CRC32 CC-131) 80C31 instruction set XC2S200 pq208 xilinx fifo generator 6.2 application of 8259 microcontroller design BCD adder pal dvb-RCS modem hitachi pbx AX1610 MC68000 opcodes adder xilinx PDF