STS192 Search Results

SPECTRA-9953

Abstract: STS-192 STS-48 PM5317
Contextual Info: PM5317 SPECTRA-9953 Advance SONET/SDH Payload Extractor/Aligner for 9953 Mbit/s FEATURES • Monolithic single channel STS192/STM-64 or quad channel STS48/STM-16 SONET/SDH Payload extractor/aligner. • Designed for use in interface applications operating at serial

Contextual Info: VSC6134 Datasheet Features ● ● ● ● ● ● ● ● ● ● Two ITU-T G.709-compliant processors GR253-compliant STS192 section and line processor OTU synchronous and asynchronous mapping 10 GbE transport with RMON MIB per IEEE 802.3 ITU-T G.975 Reed Solomon encoder and decoder

ADM processor

Abstract: regenerator in optical SPECTRA-9953 PM5317 STS-192 STS-48
Contextual Info: PM5317 SPECTRA-9953 Preliminary SONET/SDH Payload Extractor/Aligner for 9953 Mbit/s FEATURES • Monolithic single channel STS192/STM-64 or quad channel STS48/STM-16 SONET/SDH Payload extractor/aligner. • Designed for use in interface applications operating at serial

GR-253

Abstract: XIP211 XIP2198 STS-192 vhdl code for frame synchronization Paxonet Communications
Contextual Info: CoreEl STS192c/STM64 Path Processor CC324 May 6, 2003 Product Specification AllianceCORE™ Facts Paxonet Communications 4046 Clipper Court Fremont CA 94538, USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 E-mail: sales@paxonet.com URL: www.paxonet.com

TSOT1610GA

Abstract: TSOT1610G D2488 1521-pin
Contextual Info: Product Description June 2004 MARS10G T-UniPHY TSOT1610GA SONET/SDH STS-192/STM-64 Overhead Terminator and Path Processor MARS10G T-UniPHY Overview The MARS10G T-UniPHY (TSOT1610GA) is a STS192/STM-64 overhead generator/terminator and path processor which can be used in many different

PM5324

Abstract: extended sonet serial interface STM-64c Nx160 STM-16 STM-64 STS-48 1292-pin
Contextual Info: PM5324 ARROW 1x192 SONET/SDH Transport Framer/Aggregator for OC-48 and OC-192 Released Product Brief Product Highlights • Detects and inserts transport and path BIP-8 errors B1, B2, B3 . • SONET/SDH framer/aggregator for use in channelized STS192/STM-64 and STS-48/STM-16 applications

OTN testbench

Abstract: CC481 XIP2196 OTU2 framer OC48 STS192 XILINX vhdl code REED SOLOMON encoder decoder vhdl code for bram Generic AIS verilog code for TCM decoder
Contextual Info: STS192 OTN Framer/Digital Wrapper CC481 July 9, 2002 Product Specification AllianceCORE Facts Provided with Core Documentation User Guide, Design Guide EDIF netlist Design File Formats Constraints File cc481.ucf Testbench, test scripts Verification Tool

CY7C9547

Abstract: OC192C 645MHz 10GBASE-LW STS-192
Contextual Info: CONFIDENTIAL ADVANCE INFORMATION CY7C9547 POSIC10G Features — Selectable data scrambling/descrambling • Four modes of operation — Ethernet-over-SONET mode WANPHY : Supports full-duplex 10 gigabit Ethernet mapping into STS192c SONET/SDH payload in compliance with

TranSwitch Corporation

Abstract: B2M1-5
Contextual Info: PHAST-1 Device SONET STS-1 Overhead Terminator TXC-06101 DATA SHEET • Provides SONET interface to any type of payload • Programmable STS-1 or STS-N modes • Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse for

S19233

Abstract: s19235 TOSA 10G S3390 amcc CDR S19237 TOSA DWDM PB-159
Contextual Info: S19233 Product Brief 10 GbE/Fibre Channel/SONET/SDH/FEC Dual CDR 9 S1 The system circuitry consists of a highspeed phase detector, clock dividers, and equalization circuitry. The device utilizes on-chip clock recovery/clock clean-up PLL components that allow the

BROADCOM "heat sink" 7

Abstract: BCM8110 BCM8111 BCM8501 HSBGA
Contextual Info: BCM8501 PRODUCT Brief STS-192c/STM-64c POS/ATM FRAMER AND MAPPER B C M 8 5 0 1 S U M M A R Y F E AT U R E S Provides ATM and Packet over SONET/SDH POS • STS-192c (9.953 Gbps) PHY. Inserts and extracts ATM cells or POS packets into/from • the SONET Synchronous Payload Envelope (SPE).

hdlc

Abstract: GR-253 P802 S19205 S19205CBI S3091 S3092
Contextual Info: KHATANGA Product Brief Part Number S19205CBI, Revision 1.4, October 2002 10 Gigabit Ethernet MAC and PHY/OC-192c POS Framer/Mapper Features • POS processing includes HDLC framing, payload scrambling x43 + 1 and transparency processing. • Single STS-192c/STM-64 framer/mapper device to support 10

TXC-06101AILQ

Abstract: TAIS SOT GR-253-CORE TXC-06101 GR-1400-CORE 1C11C
Contextual Info: PHAST-1 Device SONET STS-1 Overhead Terminator TXC-06101 DATA SHEET • Provides SONET interface to any type of payload • Programmable STS-1 or STS-N modes • Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse for

ORT8850

Abstract: ORT8850H ORT8850L STM-64 STS-192
Contextual Info: Preliminary Product Brief May 2000 ORCA ORT8850 Field-Programmable System Chip Introduction Field-programmable system chips FPSCs bring a whole new dimension to programmable logic: FPGA logic and an embedded system solution on a single device. Lucent Technologies Microelectronics Group

S19225PBI

Abstract: amcc volta STM-16 STS-192 STS-48 ANSI T1.105 AMCC VC deskew AMCC Virtual Concatenation deskew
Contextual Info: VOLTA 192 ADVANCE Product Brief Part Number S19225PBI, March 2003 10 Port LAN/SAN Multi-Protocol VC Mapper Over STS-192 SONET/STM-64 SDH Volta is a 10-port, 10Gb/s, multi-protocol mapper device that enables optimized transport of Gigabit Ethernet GbE , DVB-ASI,

30021

Abstract: L48C L41C IC L44C DATASHEET L30C l31c L43C ORSO42G5 ORSO82G5 ORT42G5
Contextual Info: ORCA ORSO42G5 and ORSO82G5 0.6 - 2.7 Gbps SONET Backplane Interface FPSCs August 2005 Data Sheet Introduction Lattice has extended its family of high-speed serial backplane devices with the ORSO42G5 and ORSO82G5 devices. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSO42G5 and

g.653 fiber

Abstract: TxTRACE EIA-625 GR-253 coherent Transponder 10 gb laser diode the1550 card transponder ITU-T G.652 D 300pin pinout
Contextual Info: Preliminary Data Sheet July 2004 CE64-Type SONET/SDH OC-192/STM-64 and 10 GbE Transponder for Intermediate- or Long-Reach Applications 10.709 Gb/s operation. The CE64 is a third-generation family of 300-pin, MSA compliant transponders for 40km and 80km SONET applications, resulting from a design collaboration between Network Elements, Inc, and TriQuint

TsE 151

Abstract: TN-51 equivalent 7K27
Contextual Info: 1: 41 PM TSE Transmission Switch Element Datasheet Released be r, 20 07 10 :3 PM5372 nd ay ,1 6S ep te m TSE HS IN C on Su TRANSMISSION SWITCH ELEMENT Proprietary and Confidential Released Issue 7: November, 2001 Do wn l oa de d by I HS Pa r ts Ma na g

ORT8850

Abstract: ORT8850H ORT8850L scrambling write operation using ram in fpga
Contextual Info: Product Brief July 2001 ORCA ORT8850 Field-Programmable System Chip FPSC Eight-Channel x 850 Mbits/s Backplane Transceiver Introduction Field-programmable system chips (FPSCs) bring a whole new dimension to programmable logic: FPGA logic and an embedded system solution on a single

s19203

Abstract: S8710 AU-4-64c GR-253-CORE S8710PBGA STM-16 amcc 783 non-blocking STS-1 switching architecture danube STM-16 intel Architecture
Contextual Info: Part Number - S8710PBGA Product Brief Version 2.5 - June 2001 ZAMBEZI 1536 x 1536 STS-1 Grooming Switch Fabric ADVANCE PRODUCT BRIEF Features • 1536 x 1536 80G STS-1 Time Slot Interchange (TSI) Switch Fabric. • Internally biased, 100 ohm, line-to line terminations on

DESIGN AND IMPLEMENTATION OF PRBS GENERATOR

Abstract: ecl accumulator 004II
Contextual Info: Preliminary Datasheet 155/622 Mhz 16 Channel p r b s VSC8109 Generator and Comparator. Features Multiple Length PRBS Generator With Adjustable M ark Ratios PRBS Error Detector and 16-bit Accumulator STS-192/STM-64 Selectable Frame Insertion 16 Bit Static and Selectable Divider Output

DMS URBAN

Abstract: DMS URBAN coded alarms DMS1 URBAN DMS remote carrier urban fault detection broadband network SONET/CROSS-CONNECT OC-24 STM-16 STS-192 STS-48
Contextual Info: About this Document H D S L • I XC • B I S D N • C C I T T • D I D • N A N P • L ATA • M F J • O S I • U N I • V S AT • WAT S • A D S L • F T T C • G S M • H D S L • R H C • S O N E T • T C P / I P • This document is intended for anyone with an interest in advanced networks.

TOSA 10G

Abstract: 10G CDR S19233 s19235 amcc CDR S19256 GR-253 S19237
Contextual Info: PRODUC T BRIEF 33 92 S1 S19233 10 G Ethernet/Fibre Channel/SONET/SDH Dual CDR Features Description Overview • Complies with ITU-T specifications, 50 mUIpp max. jitter generation 50 KHz - 80 MHz • Complies with XFP MSA Specifications • 25 mUIpp Jitter Generation

S19250

Abstract: S19250PB STS-192 S19202CBI20 S19203 S19204 S19227 amcc S19203 rubicon
Contextual Info: PRODUC T BRIEF 50 92 S1 S19250 STS-192 SONET/SDH/FEC/GbE/FC 16-bit Transceiver with EDC Features Description • Operational from 9.9 Gbps to 11.3 Gbps • Built-In Self Test BIST with Error Counter • On-chip High-Frequency PLLs for Clock Recovery and Clock Gen.