PACKAGEPIN Search Results

sn75185 equivalent

Contextual Info: SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335 – JANUARY 1999 D D D D D D D D D D D DB, DW, N, OR PW PACKAGE TOP VIEW Single-Chip TIA/EIA-232-F Interface for IBM PC/AT Serial Port Designed to Transmit and Receive 4-µs Pulses (Equivalent to 256 kbit/s)

Contextual Info: SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154A – MARCH 1993 – REVISED MAY 1995 D D D D D D D D D D D D D Meet or Exceed Standards EIA/TIA-422-B, RS-485, CCITT Recommendation V.11 Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments

Contextual Info: SN54HC574, SN74HC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS148C – DECEMBER 1982 – REVISED JANUARY 1998 D D SN54HC574 . . . J OR W PACKAGE SN74HC574 . . . DW, N, OR PW PACKAGE TOP VIEW High-Current 3-State Noninverting Outputs

CD4069UB

Abstract: cmos hex inverter
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS054 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

Contextual Info: SN54LV367A, SN74LV367A HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS398C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54ALS541, SN74ALS540, SN74ALS541 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDAS025C – APRIL 1982 – REVISED JANUARY 1995 • • • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers pnp Inputs Reduce dc Loading Data Flow-Through Pinout All Inputs on

TLC320AD545EVM

Abstract: TLC320AD535
Contextual Info: TLC320A545C/I Single Channel Data/Fax Codec Data Manual 1999 Mixed Signal Products SLAS206B IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

SDB-205

Contextual Info: SN75971B SCSI DIFFERENTIAL CONVERTER-DATA SLLS322A – NOVEMBER 1999 – REVISED JANUARY 2000 D D D D D D D D D Provides High-Voltage Differential SCSI From Single-Ended Controller When Used With the SN75970B Control Transceiver Meets or Exceeds the Requirements of EIA

CD4066BE

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS051 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

Contextual Info: SN54LV367A, SN74LV367A HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS398C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54ALVTH16601, SN74ALVTH16601 2.5-V/3.3-V 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES143A – SEPTEMBER 1998 – REVISED JULY 1999 D D D D D D D D D D D D D UBT  Universal Bus Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent,

Contextual Info: TLC7524C, TLC7524E, TLC7524I 8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS SLAS061C – SEPTEMBER 1986 – REVISED NOVEMBER 1998 D D D D D, N, OR PW PACKAGE TOP VIEW Easily Interfaced to Microprocessors On-Chip Data Latches Monotonic Over the Entire A/D Conversion

Contextual Info: SN54AHCT594, SN74AHCT594 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS417C – JUNE 1998 – REVISED JANUARY 2000 D D 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QA SER RCLR RCLK SRCLK SRCLR QH′ SN54AHCT594 . . . FK PACKAGE TOP VIEW QD QE NC QF QG description

Contextual Info: TLC2942 HIGH-PERFORMANCE DUAL PHASE-LOCKED LOOP BUILDING BLOCK SLAS146B – NOVEMBER 1996 – REVISED JUNE 1997 D D D D DB PACKAGE Dual TLC2932 by Multichip Module MCM Technology Voltage-Controlled Oscillator (VCO) Section: – Complete Oscillator Using Only One

BGA-56P-M01

Abstract: DS05-50216-1E
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS05-50216-1E Stacked MCP Multi-Chip Package FLASH MEMORY & SRAM CMOS 16M (x 8/×16) FLASH MEMORY & 2M (× 8/×16) STATIC RAM MB84VD2108XEA-70/85/MB84VD2109XEA-70/85 • FEATURES • Power Supply Voltage of 2.7 to 3.3 V

ad624 application

Abstract: AD624
Contextual Info: ANALO G D EVIC ES Precision Instrumentation Amplifier AD624 FEATURES Low Noise: 0.2 |iV p-p 0.1 Hz to 10 Hz Low Gain TC: 5 ppm max G = 1 Low Nonlinearity: 0.001% max (G = 1 to 200} High CMRR: 130 dB min (G = 500 to 1000) Low Input Offset Voltage: 25 |i,V, max

MCF5206

Abstract: Motorola ColdFire 5202 verilog code 8 bit LFSR MC68000 MC68060 MCF5102 MCF5202 MCF5204 metal scaffold verilog code 16 bit processor
Contextual Info: Design, Verification, and Test of the ColdFireTM Embedded Microprocessors Al Crouch Jeff Freeman Motorola, Inc. 6501 William Cannon Drive West Austin, Texas 78735-8598 1997 Symposium ColdFire is a trademark of Motorola, Inc. Design, Verification, and Test of the ColdFire Embedded

80C515

Abstract: 80C515A C500 C515A C515C C515C-8E C515C-8R
Contextual Info: 8-Bit Microcontrollers The C515C is a derivative of the C500 family of 8-Bit microcontrollers with new peripherals. It combines the well known functionality of the standard 80C515A microcontroller with enhanced features. The C515C features a SPI compatible interface and a CAN module

MB84VD2118XA

Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET AE3E Stacked MCP Multi-Chip Package FLASH MEMORY & SRAM CMOS 16M (x 8/×16) FLASH MEMORY & 4M (× 8/×16) STATIC RAM MB84VD2118XA-85/MB84VD2119XA-85 • FEATURES • Power supply voltage of 2.7 to 3.6 V • High performance

C805d

Abstract: 7407N AD624
Contextual Info: a FEATURES Low Noise: 0.2 ␮V p-p 0.1 Hz to 10 Hz Low Gain TC: 5 ppm max G = 1 Low Nonlinearity: 0.001% max (G = 1 to 200) High CMRR: 130 dB min (G = 500 to 1000) Low Input Offset Voltage: 25 ␮V, max Low Input Offset Voltage Drift: 0.25 ␮V/؇C max Gain Bandwidth Product: 25 MHz

CAT1161

Abstract: CAT1162
Contextual Info: CAT1161, CAT1162 Supervisory Circuits with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog Timer 16K brown out protection and a watchdog timer are integrated together in low power CMOS technology. Memory interface is via an I2C bus. FEATURES

tag 9114

Abstract: J630C GS214
Contextual Info: VITESSE VSC7201A 1 GByte/Sec SCI Compliant Link Controller Preliminary Data Sheet Features • Conforms to IEEE SCI Standards: IEEE Standard 1596-1992 • 64-Bit Bi-Directional GTL System Interface • +3.3V and +2V Power Supplies Required • Sends and Receives SCI Data in 2ns for

UTM ceramic RESISTOR 212-3

Abstract: AD2033 rs 380sh NyQuist 3 axis DAX 3S OP27GN IC BD 540 LYS HTC Desire 816 Dual SIM HTC A5 12SmV cmos cookbook Monsanto 7 segment displays
Contextual Info: General Information ANALOG DEVICES DATA-ACQUISITION DATABOOK 1984 VOLUME I INTEGRATED CIRCUITS Table of Contents Ordering Guide Q Operational Amplifiers Instrumentation & Isolation Amplifiers c Analog Signal Processing Components m a Voltage References Temperature Measurement Components

AMBE3000

Abstract: dpmr vocoder implementation AMBE-3000TM AMBE SOFTWARE AMBE-3000 VOCODER VOCODER p25 AMBE 45p6 Viterbi Decoder
Contextual Info: AMBE-3000 Vocoder Chip Users Manual Version 2.4 October, 2010 DVSI Confidential Proprietary AMBE-3000™ Vocoder Chip Users Manual Version 2.4, October, 2010 AMBE-3000™ Vocoder Chip Users Manual Version 2.4 October, 2010 The most up to date version of the manual is always available at www.dvsinc.com