P7LIN Search Results

diode T35 12H

Abstract: ST10F269Z2Q6 ST10F269Q ST10F269Z2T3 PQFP144 ST10F269 TQFP144 diode t318 BB126 st10 Bootstrap
Contextual Info: ST10F269 16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM DATASHEET • ■ 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM CAN1_RXD CAN1_TXD CAN1 CAN2_RXD CAN2_TXD CAN2 PEC Oscillator and PLL 16 Interrupt Controller

GPR circuit schematic diagram full

Abstract: DP43 T308 ST10F269-T6 ST*10f269-q3 m29F ST10F269-T3 TQFP144 f082h st10 Bootstrap
Contextual Info: ST10F269-T3 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM March 2003 FAIL-SAFE PROTECTION – PROGRAMMABLE WATCHDOG TIMER – OSCILLATOR WATCHDOG • ■ ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION – ON-CHIP PLL – DIRECT OR PRESCALED CLOCK INPUT

GPR circuit schematic diagram full

Abstract: ST10F269Z2q3 PQFP144 ST10 ST10F269 03 T48 regulator st10 Bootstrap
Contextual Info: ST10F269Z2Qx 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA August 2002 • ■ 16 32 256K Byte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM PEC Oscillator and PLL CAN1_RXD CAN1_TXD

ST10F269 03

Abstract: ST10F269 AN1313 ST10F168 ST10 p7lin EE00h ESFR st10f168s
Contextual Info: AN1313 APPLICATION NOTE Porting an application from the ST10F168 to the ST10F269 By Charles AUBENAS 1 - INTRODUCTION The ST10F269 is a new derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS micro-controllers. It is upward compatible with the ST10F168.

89H64H16G3

Abstract: PES64H16G3 89HPES64H16G3
Contextual Info: 64-Lane 16-Port PCIe Gen3 System Interconnect Switch 89HPES64H16G3 Data Sheet ® Device Overview – Autonomous and software managed link width and speed control – Per lane SerDes configuration • Full back channel equalization support • Rx, 5 tap DFE

C167

Abstract: C167 reset C167 derivatives siemens C167 spi C167CR C167CR-16FM C167CR-16RM C167CR-4RM C167CR-LM bc167 siemens
Contextual Info: C167C.bk Page 1 Montag, 7. Oktober 1996 12:43 Uhr C167 Derivatives 16-Bit CMOS Single-Chip Microcontrollers User’s Manual 03.96 Version 2.0 T2032-0V11-M1-7600 C167C.bk Page 2 Montag, 7. Oktober 1996 12:43 Uhr C167 Revision History: Previous Version: Page

GPR circuit schematic diagram full

Abstract: ST10F269-Q3 ST10F169 PQFP144 DCMI timing specification st10 Bootstrap gpr schematic diagram EA99
Contextual Info: ST10F269-Q3 16-BIT MCU WITH 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA • ■ ■ ■ 16 32 256KByte FlashMemory 2K Byte Internal RAM 16 CPU-Coreand MACUnit Watchdog 16 10KByte XRAM PEC 16 16 8 16 Interrupt Controller XTAL1 Port 6 8 Port5 16

FUN-JIN

Abstract: FUN-JIN ft40 PHJ8-2ROW FT40-801S ip108 FT1-M4-4023E ip101 BAYCOM FT1-M4-4023E 40ST1041AX P23S
Contextual Info: 5 4 Power Module Page 2 1 EEPROM 24C02/8 D EEDAT EECLK Page 7 IP101 Fiber or Web management Extend Interface Port 25/26 C 2 PCB 1 AC 110V -> DC 3.3V/5A D 3 CPU_DAT CPU_CLK IP1726 MII 1 MII 2 TF320 RS232 3.3V->1.8V 24 SS-SMII + 2 MII 10/100M Switch Controller

st10 Bootstrap

Abstract: T03-15 ST10F269 03
Contextual Info: ST10F269 16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM DATASHEET • ■ 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM CAN1_RXD CAN1_TXD CAN1 CAN2_RXD CAN2_TXD CAN2 PEC Oscillator and PLL 16 Interrupt Controller

C100H

Abstract: PIN DIAGRAM of st10f280 EE30h st10 Bootstrap BUT16
Contextual Info: ST10F280 16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM PRODUCT PREVIEW • ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION - ON-CHIP PLL. - DIRECT OR PRESCALED CLOCK INPUT. ■ UP TO 143 GENERAL PURPOSE I/O LINES - INDIVIDUALLY PROGRAMMABLE AS INPUT, OUTPUT OR SPECIAL FUNCTION.

ST10F269 03

Abstract: GPR circuit schematic diagram full PQFP144 ST10F269 ST10F269-Q3 st10 Bootstrap FE90
Contextual Info: ST10F269 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM PRELIMINARY DATA • ■ ■ ■ 16 32 256K Byte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM PEC Oscillator and PLL CAN1_RXD CAN1_TXD CAN1 CAN2_RXD

STK 411-550 E

Abstract: stk power amplifiers 411-550 UM0404 st10 Bootstrap datasheet STK 411-550 E 221-550 st10f276 jtag DIS12 ST10F276 CAN bit timing ST10
Contextual Info: UM0404 User manual ST10F276 Introduction This manual describes the functionality of the ST10F276 device. An architectural overview describes the CPU performance, the on-chip system resources, the on-chip clock generator, the on-chip peripheral blocks and the protected bits.

ST10F276

Abstract: ST10 ST10F276 CAN bit timing EF46h st10 Bootstrap STK 4 182 power amplifier ST10F
Contextual Info: UM0407 User manual ST10F272Zx Introduction This manual describes the functionality of the ST10F272Zx devices. An architectural overview describes the CPU performance, the on-chip system resources, the on-chip clock generator, the on-chip peripheral blocks and the protected bits.

Contextual Info: ST10F269Zx 16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM DATASHEET • ■ 128K or 256KByte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM 16 16 8 16 Interrupt Controller 8 Por t 5 16 BRG BRG

Contextual Info: 48-Lane 12-Port PCIe Gen2 System Interconnect Switch 89HPES48H12AG2 Data Sheet ® Devic e Ove r vie w The 89HPES48H12AG2 is a member of the IDT PRECISE family of PCI Express® switching solutions. The PES48H12AG2 is a 48-lane, 12-port system interconnect switch optimized for PCI Express Gen2

Contextual Info: 64-Lane 16-Port PCIe Gen3 System Interconnect Switch 89HPES64H16G3 Data Sheet ® Device Overview – Autonomous and software managed link width and speed control – Per lane SerDes configuration • Full back channel equalization support • Rx, 5 tap DFE

st10f296

Abstract: st10f296 boot marking code W1p st10 Bootstrap 15B3 ST339
Contextual Info: ST10F296E 16-bit MCU with MAC unit, 832 Kbyte Flash memory and 68 Kbyte RAM Features • ■ High performance 16-bit CPU with DSP functions – 31.25 ns instruction cycle time at 64 MHz max CPU clock – Multiply/accumulate unit MAC 16 x 16-bit multiplication, 40-bit accumulator

89HPES64H16AG2

Abstract: 89H64H16AG2 ssmb
Contextual Info: 64-Lane 16-Port PCIe Gen2 System Interconnect Switch 89HPES64H16AG2 Data Sheet ® Device Overview The 89HPES64H16AG2 is a member of the IDT PRECISE family of PCI Express® switching solutions. The PES64H16AG2 is a 64-lane, 16-port system interconnect switch optimized for PCI Express Gen2

89H22H16G2

Abstract: 89H22H16G2ZCBLG
Contextual Info: 22-Lane 16-Port PCIe Gen2 System Interconnect Switch 89HPES22H16G2 Data Sheet ® Device Overview  The 89HPES22H16G2 is a member of the IDT PRECISE family of PCI Express® switching solutions. The PES22H16G2 is a 22-lane, 16port system interconnect switch optimized for PCI Express Gen2 packet

CC1215

Abstract: how to work st10c167 ST10R167 st10r167 buscon 256K DPRAM SERVICE MANUAL st10r167 transmitter circuit in GPR reference manual st10r167 ST10X167 ST10
Contextual Info: ST10X167 USER’S MANUAL Release 1.1 This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice. ST10X167 TABLE OF CONTENTS Page 1- INTRODUCTION .

error multiplexer parity comparator

Abstract: PQFP144 ST10 ST10F269 TQFP144 1221h ST10F269 03 st10 Bootstrap p46a
Contextual Info: ST10F269Zx 16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM DATASHEET • ■ 128K or 256KByte Flash Memory 2K Byte Internal RAM 16 CPU-Core and MAC Unit Watchdog 16 10K Byte XRAM 16 16 8 16 Interrupt Controller 8 Por t 5 16 BRG BRG

PES64H16AG2

Abstract: 89H64H16AG2 89HPES64H16AG2 89H64H16
Contextual Info: 64-Lane 16-Port PCIe Gen2 System Interconnect Switch ® Device Overview The 89HPES64H16AG2 is a member of the IDT PRECISE family of PCI Express® switching solutions. The PES64H16AG2 is a 64-lane, 16-port system interconnect switch optimized for PCI Express Gen2

ST*10f269-q3

Abstract: syscon sw 301 st10 Bootstrap ST10F269-T3 dp3121
Contextual Info: ST10F269-T3 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM March 2003 FAIL-SAFE PROTECTION – PROGRAMMABLE WATCHDOG TIMER – OSCILLATOR WATCHDOG • ■ ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION – ON-CHIP PLL – DIRECT OR PRESCALED CLOCK INPUT

Contextual Info: ST10F296E 16-bit MCU with MAC unit, 832 Kbyte Flash memory and 68 Kbyte RAM Features • High performance 16-bit CPU with DSP functions – 31.25 ns instruction cycle time at 64 MHz max CPU clock – Multiply/accumulate unit MAC 16 x 16-bit multiplication, 40-bit accumulator