P1496 Search Results

STP4020

Contextual Info: S un M icroelectronics July 1997 PCMCIA Controller Interface DATASHEET D e s c r ip t io n The STP4020 PCMCIA controller bridges the SBus standard in SPARC microprocessor-based systems, to the PCMCIA Card Standard Interface. PCMCIA compatible peripheral cards provide a standard interface and

PA15

Abstract: PA19 STP2001 STP2200ABGA STP2210QFP STP2220ABGA STP2230SOP
Contextual Info: Preliminary STP2220ABGA July 1997 U2S UPA-to-SBus Interface DATA SHEET DESCRIPTION The STP2220ABGA U2S [1] device bridges UPA- UltraSPARC Port Architecture to the SBus. U2S, is the primary connection between the UPA port (including UltraSPARC-I processors and memory) and the SBus

Contextual Info: STP4020QFP S un M ic r o e l e c t r o n ic s J u ly 1997 PCMCIA Controller Interface DATA SHEET D e s c r ip t io n The STP4020 PCM CIA controller bridges the SBus standard in SPARC m icroprocessor-based systems, to the PCM CIA Card Standard Interface. PCM CIA com patible peripheral cards provide a standard interface and

Contextual Info: Preliminary STP2220ABGA S un M ic r o e l e c t r o n ic s J u ly 1997 U2S UPA-to-SBus Interface DATA SHEET D e s c r ip t io n The STP2220ABGA U2S ^ device bridges UPA- UltraSPARC Port Architecture to the SBus. U2S, is the prim ary connection betw een the UPA port (including UltraSPARC-1 processors and m em ory) and the SBus

STP4020PQFP

Abstract: 80507 PCMCIA Controller
Contextual Info: STP4020QFP July 1997 PCMCIA Controller Interface DATA SHEET DESCRIPTION The STP4020 PCMCIA controller bridges the SBus standard in SPARC microprocessor-based systems, to the PCMCIA Card Standard Interface. PCMCIA compatible peripheral cards provide a standard interface and form factor for mass

ao21

Contextual Info: S un M ic r o e l e c t r o n ic » U2S, UPA-to-SBus Interjace Data Sheet D ecem b e r 1 966 STP2220BG A Sun microsystems STP2220B G A S un M i c r o e l e c t r o n i c s December 1996 U2S UPA-to-SBus Interface DATA SHEET D escription The STP2220BGA U 2 S ,1] device bridges UPA- UltraSPARC Port Architecture to the SBus. U2S, is

YV20

Contextual Info: S un M icroelectronics July 1997 _ U2S DATA SHEET UPA-to-SBus Interface D e s c r ip t io n The STP2220ABGA U 2 S d e v i c e bridges UPA- UltraSPARC Port Architecture to the SBus. U2S, is the primary connection between the UPA port (including UltraSPARC-1 processors and memory) and the SBus

P1496

Abstract: Multibus arbitration protocol Multibus ii protocol FUTUREBUS IEEE-1296 C1996 P1014 P1394 P1596 multibus II architecture specification
Contextual Info: National Semiconductor Application Note 1036 Paul Borrill January 1996 ABSTRACT Futurebus a is a specification for a scalable 32 64 128 or 256-bit wide bus architecture Arbitration is provided by a fully distributed one or two pass parallel contention arbiter

AU-2A-1240

Abstract: AU-1433
Contextual Info: A M PLIFIER S BY M ODEL N U M BER a m - io b ? j 5 ~ i§ 0 0 5 D - 1200 0 0 1 -1 0 0 0 1 -1 0 0 0 AM-4A 1016 AM-4A 0 2 3 AM-5A-0515 5 0 0 -2 0 0 0 1000 -1 5 0 0 1000 -2GQC 5 0 0 - 1500 AU-11Q&-1000 A M -'141 AM-12V7 AM -1299 A M -1300 A M -1309 A M -1312 A M -1326

fet B20 p03

Abstract: m7101 M1535 a1 MAXIM 1535 CE KB3886 VT6202 amtek HK-AE-15A1R0 p1488 VIA VT6202
Contextual Info: 5 4 3 2 1 Charge & Selector PAGE 28 PWRGD & ENABLEVIO Circuit D ROM & CMS PAGE 34 System Power 5V & 3V MAX1632 TABLET PC - T01 BLOCK DIAGRAM PAGE 8 Vcore Power Maxim 1718 PAGE 30 DEBUG TDM Port PAGE 33 VGA & DDR Power D PAGE 8 DDR PAGE 31 DDR on Board CRUSOE

PCMCIA IO Card Controller

Contextual Info: C o n tro lle r In terfac e Data Sheet J a n u a ry 1 997 S T P 402 0 Sun microsystems S TP 4 0 2 0 S un M ic r o elec tr o n ic s January 1997 PCMCIA Contoller Interface DATA SHEET D e s c r ip tio n The STP4020 PCM CIA controller bridges the SBus standard in SPARC m icroprocessor-based sy s­