OX3F Search Results

MC2100 REV B

Abstract: MC2100 REV c 74109 MC2100 e rev b MC2100 Rev A MC212 MC2100 MC2300 MC2400 MC2500
Contextual Info: Navigator Motion Processor MC2100 Series Technical Specifications for Brushed Servo Motion Control Performance Motion Devices, Inc. 55 Old Bedford Road Lincoln, MA 01773 Revision 1.6, April 2002 NOTICE This document contains proprietary and confidential information of Performance Motion Devices,

ADSP-2181

Contextual Info: ANALOG DEVICES DSP Microcomputer ADSP-2181 FEATURES PERFORMANCE 25 ns Instruction Cycle Time from 20 MHz Crystal @ 5.0 Volts 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in

Contextual Info: ANALOG DEVICES Mixed-Signal Processor with Host Interface Port ADSP-21 msp50A/55A/56A FEATURES 77 ns Instruction Cycle Time from 13.00 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM 1K Words of On-Chip Data Memory RAM

Contextual Info: ANALOG DEVICES FEATURES PERFORMANCE 25 ns Instruction Cycle Tim e 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture A llow s Dual Operand Fetches in Every Instruction Cycle M ultifunction Instructions

Contextual Info: ANALOG ► DEVICES DSP Microcomputer ADSP-2105 FEATURES Complete DSP Microcomputer 100 ns Instruction Cycle Time from 10 MHz Crystal ADSP-2100 Code- & Function-Compatible ADSP-2101 Pin-Compatible 1K Words of On-Chip Program Memory RAM 512 Words of On-Chip Data Memory RAM

CL 2181 ic

Abstract: AT/CL 2181 ic CL 2181
Contextual Info: ANALOG DEVICES DSP Microcomputers ADSP-2181 /ADSP-2183 FEATURES PERFORMANCE 30 ns Instruction Cycle Time @ 5.0 Volts 33 MIPS Sustained Performance 34.7 ns Instruction Cycle Time @ 3.3 Volts Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in

LIN source code

Abstract: OX3F eusart PIC18
Contextual Info: Interrupt Driven EUSART Based LIN-Master Library Module 1. Introduction. 2 2. Module Features . 2

2184S

Contextual Info: ANALOG DEVICES Preliminary Technical Data FEATURES PERFORMANCE 25 ns Instruction Cycle Tim e 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture A llow s Dual Operand Fetches in Every Instruction Cycle

adsp 2186 EZ-KIT

Abstract: adsp-2186 instruction set
Contextual Info: ADSP-2186/ADSP-2186L Preliminary Data Sheet S eptem b er 1996 For current information contact Analog Devices at 617 461-3881 ADSP-2186/ADSP-2186L DSP Microcomputers FEATURES Performance • 3 0 n s I n s t r u c t i o n C y c le T im e @ 5 .0 V o lts , 3 3 M IP S S u s t a i n e d P e r f o r m a n c e

ATIC 107

Abstract: cr-e5
Contextual Info: FDC97W33X s n ig c STANDARD MICROSYSTEMS CORPORATION Integrated I/O Controller with Wakeup Features FEATURES • • • • • • • • • • 5 Volt Operation Plug & Play 1 .OA Com pliant Supports 13 IRQs, 4 DMA Channels, Full 16 Bit Addresses Decoding

Contextual Info: FDC37C93XFR SMC ADVANCE INFORMATION STANDARD M IC R O SY ST EM S CORPORATION Plug and Play Compatible Ultra I/O Controller with Fast IR FEATURES ISA Plug-and-Play Standard {Version 1.Oa Compatible Register Set Soft Power Management, SMI Support ACCESS.bus Support

TSE 4041

Abstract: ADSP-21msp56a PGA300 msp50 ADSP-21msp55A ADSP-21msp50 001C 27C64 80C51 HA20
Contextual Info: ► ANALOG DEVICES Mixed-Signal Processor with Host Interface Port ADSP-21 msp50A/55A/56A FEATURES 77 ns Instruction Cycle Time from 13.00 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM 1K Words of On-Chip Data Memory RAM

transistor manual substitution FREE DOWNLOAD

Abstract: transistor manual substitution gcu 101 setting manual ALL TYPE IC DATA AND manual substitution BOOK Transistor Substitution Data Book 1993 i960 KA/KB Reference Manual 80960KB Programmer Reference manual BP 43 substitution i960 KA/KB Programmers Reference Manual GCC960
Contextual Info: i960 Processor Compiler User’s Manual Order Number: 651230-004 Revision Revision History Date 001 Initial Release 02/96 002 Revised for release 5.1 01/97 003 Revised for release 6.0 12/97 004 Revised for release 6.5 12/98 In the United States, additional copies of this manual or other Intel literature may be obtained by writing:

SLTA-10

Abstract: PSG-20 LTS-20 EIA-232 lpt70 hp schematic diagram of laptop motherboard TP-RS485-78 TP-RS485-625 circuit diagram laptop motherboard hp laptop MOTHERBOARD pcb CIRCUIT diagram
Contextual Info: LTS-20 LonTalk@Serial Adapter and PSG-20 User’s Guide Version 2 I ECHELON’ Corporation 078-0181-OlC No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying,

8 X 6 YS patterson pump

Abstract: MPC512X MPC5125 pt 92-110 AD161 mpc5121 Bosch throttle body Throttle Position Sensor bosch motorola Transistor BC 457 MPC5125RM
Contextual Info: MPC5125 Microcontroller Reference Manual Devices Supported: MPC5125 Document Number: MPC5125RM Rev. 2 11/2009 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc.

gcu 101 setting manual

Abstract: cc196 ALL TYPE IC DATA AND manual substitution BOOK 80960KB Programmer Reference manual M-CORE Programmers Reference Manual GCC960 TLO32 i960 KB Processor gdb960
Contextual Info: i960 Processor Compiler User’s Manual Order Number: 651230-003 Revision Revision History Date 001 Initial Release. 02/96 002 Revised for release 5.1. 01/97 003 Revised for release 6.0. 12/97 In the United States, additional copies of this manual or other Intel literature may be obtained by writing:

Contextual Info: ANALOG DEVICES DSP Microcomputer ¿DSP-2183 FUNCTIONAL BLOCK DIAGRAM FEATURES PERFORMANCE 19 ns Instruction Cycle Time from 26.32 MHz Crystal @ 3.3 Volts 52 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in

SUN HOLD ras 0910

Abstract: L64845 fbc 337 POLYGON TEC L64852 sun microsystem microprocessor assembly bresenham algorithms L64853A L64853
Contextual Info: LSI LOGIC 5304004 001E01Ô Û01 E l LLC L64845 SGX SBus Graphics Accelerator Technical Manual fé '' •j// M £ J $ á S ' / J A ' & *' .à ' ÿ ^ :V k Jf $ ’ O fi t s 4: 'I F/Ts } ■ £ MS71-000113-99 A \ E3 S304AD4 D D lSO n 74fl E 3 L L C This document is preliminary. As such, it contains data derived from func­

MC2502

Abstract: d12 Incremental Encoder 74ls377 MC2300 MC2400 MC2500 MC2100 74ALS169 MC2142 mc25122
Contextual Info: Navigator Motion Processor MC2502 Series Technical Specifications for Stepping Motion Control Performance Motion Devices, Inc. 55 Old Bedford Road Lincoln, MA 01773 Revision 1.0, July 2003 NOTICE This document contains proprietary and confidential information of Performance Motion Devices,

IDT3081

Abstract: ANDC13 G2553 AHA3411 R3000 Am29k d2059 D2259
Contextual Info: Advanced Hardware A rchite ctures, Inc. 1.0 INTRODUCTION _ AHA3411 is a lossless compression coprocessor IC under development for hardcopy systems on many standard platforms, including PCI Bus. The device is targeted for high throughput and high resolution hardcopy systems.

V360EPC

Abstract: 1gg7 Extended Sector Remapper V3 Semiconductor V350EPC design of dma controller using vhdl eeprom programmer schematic 24c02 V292PBC V960PBC V961PBC
Contextual Info: Chapter 1 Introduction In a very short period of tim e the PCI bus standard has moved beyond the PC to become the most w idely accepted high-performance bus standard for embedded applications. As a leader in providing chipset solutions for high-end embedded applications, V3 Sem iconductor

SLTA-10 Serial LonTalk Adapter

Abstract: MIP 282 SLTA-10 circuit Integer numerique cmd SLTA la 78040 d 78040 EIA-282 SLTA-10 Adapter EIA-232
Contextual Info: SLTA-10 Adapter and PSG/3 User’s Guide Revision 3 e ECHELON’ Corporation 078-0160-OlE Echelon, LON, LonTalk, LonBuilder, NodeBuilder, Neuron, LonManager, LONMARK, LonMaker, LONWORKS, 3120 and 3150 are registered trademarks of Echelon Corporation. LonSupport

Contextual Info: ANALOG DEVICES DSP Microcomputer ADSP-2183 FEATURES PERFORMANCE 19 ns Instruction Cycle Time from 26.32 MHz Crystal @ 3.3 Volts 52 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in

Contextual Info: ANALOG DEVICES Preliminary Technical Data FEATURES PERFORMANCE 25 ns Instruction Cycle Tim e 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture A llow s Dual Operand Fetches in Every Instruction Cycle