OPB 800 Search Results

DS404

Abstract: xbm 898
Contextual Info: OPB to PLB Bridge v1.00c DS404 April 24, 2009 Product Specification Introduction LogiCORE IP Facts The On-Chip Peripheral Bus (OPB) to Processor Local Bus (PLB) Bridge module translates OPB transactions into PLB transactions. It functions as a slave on the OPB side and a

000000A5

Abstract: sdram controller SDRAM XAPP132 Spartan-IITM 200 baa0 vhdl code for DCM DRAM controller memory FPGA
Contextual Info: OPB Synchronous DRAM SDRAM Controller (v1.00e) DS426July 21, 2005 Product Specification Introduction LogiCORE Facts The Xilinx OPB SDRAM Controller provides a SDRAM Controller that connects to the OPB and provides the control interface for SDRAMs. It is assumed that the reader is familiar with SDRAMs and the IBM PowerPC™.

Virtex-4 XC4VLX60

Abstract: sdram controller CLK180 DS424 XC2VP20 XC3S1500 XC4VLX60 A01055 vhdl code for ddr sdram controller
Contextual Info: DS496 November 15, 2005 MCH OPB Double Data Rate DDR Synchronous DRAM (SDRAM) Controller Product Specification Introduction LogiCORE Facts The Xilinx Multi-CHannel (MCH) On-chip Peripheral Bus (OPB) Double Data Rate Synchronous DRAM (SDRAM) controller for Xilinx FPGAs provides a DDR SDRAM controller which connects to the OPB and multiple channel

DDR2 DIMM VHDL

Abstract: 3CA3F DS414 DDR2 SDRAM Controller JESD79-2A 1446-69 sdram controller CLK180 DS532 interface ddr2 sdram with spartan3
Contextual Info: Multi-CHannel OPB Double Data Rate DDR2 Synchronous DRAM (SDRAM) Controller DS532 March 20, 2006 Product Specification Introduction LogiCORE Facts The Xilinx Multi-CHannel On-chip Peripheral Bus Double Data Rate Synchronous DRAM (MCH OPB DDR2 SDRAM) controller for Xilinx FPGAs provides a DDR2 SDRAM controller that connects to the OPB and multiple channel interfaces and provides the control interface for DDR2

OPB890

Abstract: optek opb
Contextual Info: 0 . OPTEK Product Bulletin OPB 88O May 1993 Slotted Optical Switches Types OPB 88O, OPB89Q Series Features Absolute Maximum Ratings Ta = 25°C unless otherwise noted • • • • Storage and Operating Temperature Range. -40°C to + 8 0°C ^

icap

Abstract: verilog code for crossbar switch RAMB16 Circuit Implementation Using Multiplexers super8 circuit
Contextual Info: OPB HWICAP DS 280 v1.3 March 15, 2004 Product Specification Introduction LogiCORE Facts This product specification describes the functionality of the HWICAP core for the On-Chip Peripheral Bus (OPB). The HWICAP module enables an embedded microprocessor

tras 250ns

Abstract: sdram controller XAPP132 baa0 vhdl code for sdram controller vhdl code for DCM
Contextual Info: MCH_OPB Synchronous DRAM SDRAM Controller (v1.00a) DS492 April 4, 2005 Product Specification Introduction LogiCORE Facts The Xilinx Multi-CHannel-OPB(MCH_OPB) SDRAM controller provides a SDRAM controller that connects to the OPB bus and multiple channel interfaces, and provides the

DS437

Abstract: 0X00 PCI64 REQ64
Contextual Info: OPB IPIF/LogiCore V3 PCI Core Bridge DS437 v1.2 July 30, 2002 Summary This document provides the design specification for the bridge between the OPB IPIF and the LogiCORE PCI64 Interface v3.0 core. Only 33/66 MHz, 32-bit PCI buses are supported at this time.

transistor TIP 320

Contextual Info: [*9 SLOTTED OPTICAL SWITCH OPTOELECTRONICS OPB861N51/OPB861N55 PACKAQE DIMENSIONS The OPB 861N series of switches is designed to allow the SEE NOTE 3 user m axim um flexibility in applications. Each switch consists of an infrared emitting diode facing an NPN

how to reset 24lC04

Abstract: 24LCO4 XPS IIC ML403 24L02 CRAA DTR20 embedded system projects free XC4VFX12 UART ml403
Contextual Info: Application Note: Embedded Processing Reference System: OPB IIC Using the ML403 Evaluation Platform R XAPP979 v1.0 February 26, 2007 Summary Author: Paul Glover, Ed Meinelt, Lester Sanders This application note describes how to build a reference system for the On-Chip Peripheral Bus

OPB875

Abstract: QP8870 OPB871 L1052 m745 800LA OPB867 OPB876 OPB 800
Contextual Info: Slotted Optical Switches Types OPB 86O, OPB87Û Series Package N Package L Package P Package T Features Absolute Maximum Ratings Ta = 25°C unless otherwise noted • 0.125" wide gap • Choice of aperture • Choice of opaque or IR transmissive shell material

Contextual Info: 0 .O P I E K Product Bulletin OPB86O May 1993 Slotted Optical Switches Types OPB 86O, OPB870 Series Features Absolute Maximum Ratings Ta = 25°C unless otherwise noted • 0.125" wide gap • Choice of aperture • Choice of opaque or IR transmissive shell material

m14 cpm log

Abstract: crama
Contextual Info: Part Number 405EZ Revision 1.26 - April 23, 2007 405EZ Preliminary Data Sheet PowerPC 405EZ Embedded Processor Features • AMCC PowerPC 405 32-bit RISC processor core operating at up to 416MHz • IEEE 1588 Precision Timing Protocol PTP controller • On-chip 32-bit peripheral bus (OPB) operating at

OPB 2255

Abstract: OPB-8870
Contextual Info: 27E I OPTEK TECHNOLOGY INC • L,7iaSflO 0000=14^ 3 M OPTEK Product Bulletin OPB86O July 1989 Replaces January 1988 Slotted Optical Switches -p m -i3. Types OPB 86O, OPB87Q Series Features Absolute Maximum Ratings Ta = 25°G unless otherwise noted) • 0.125" wide gap

Contextual Info: Part Number 405EZ Revision 1.25 - April 2, 2007 405EZ Preliminary Data Sheet PowerPC 405EZ Embedded Processor Features • AMCC PowerPC 405 32-bit RISC processor core operating at up to 416MHz • IEEE 1588 Precision Timing Protocol PTP controller • On-chip 32-bit peripheral bus (OPB) operating at

transistor w04

Abstract: AMCC DATE CODE IBM powerpc 405ez sdc 603 serial flash 256Mb fast erase spi 405EZ CU-11 EF60 PPC405EZ-CSA416TZ GPRS modem M10
Contextual Info: Part Number 405EZ Revision 1.27 - August 22, 2007 405EZ Preliminary Data Sheet PowerPC 405EZ Embedded Processor Features • AMCC PowerPC 405 32-bit RISC processor core operating at up to 416MHz • IEEE 1588 Precision Timing Protocol PTP controller • On-chip 32-bit peripheral bus (OPB) operating at

OPB861N

Abstract: OPB861N51 OPB861N55 transistor TIP 320
Contextual Info: E *Q SLOTTED OPTICAL SWITCH OPTOELECTRONICS O PB 861 N51/OPB 861 N55 PACKAGE DIMENSIONS DESCRIPTION Th e O PB 861N series of switches is designed to allow the SEE NOTE 3 user m axim um flexibility in applications. Each switch consists of an infrared emitting diode facing an NPN

GPIO009

Abstract: ibm 130nm CMOS GPIO109
Contextual Info: Part Number 405EZ Revision 1.24 - March 5, 2007 405EZ Preliminary Data Sheet PowerPC 405EZ Embedded Processor Features • AMCC PowerPC 405 32-bit RISC processor core operating at up to 416MHz • IEEE 1588 Precision Timing Protocol PTP controller • On-chip 32-bit peripheral bus (OPB) operating at

Contextual Info: QPTEK Product Bulletin OPB830 July 1996 Slotted Optical Switches Types OPB83QL, OPB84QL Series NOTES: 1, DltCNSIONS CONTROLLED AT r«LSiNC SURFACE ONLY. 2 . oPBeaoL nw u opesaaL «mo gp bb jol tw ju opb&«2l IEAO SPACIK5: 385 B.2B .315 (B.00) Features • 0.125" (3.18 mm) wide slot

st2160

Abstract: TIP 318 transistor TIP 320 OPB861T OPB861T51 OPB861T55 diode 319 TRANSISTOR 318
Contextual Info: [S X ! ir ^ r —1 SLOTTED OPTICAL SWITCH OPTOELECTRONICS OPB 861 T 51 /O PB 861 T 5 5 PACKAGE DIMENSIONS SEE NOTE 3 p1 I ] s I (ft - .3 1 3 (7.94) OPTICAL •1 2 5 (3 -JJ7)“ C ENTERLINEx E“ ~ r .345 (6.76) I I .020(0.51)' T 1-.100 (2.54) .125 (3.18) R

Contextual Info: OPTE K T E C H N O L O G Y INC S7E D • bTTflSflQ Q Q O D T S B *4 ■ @ Product Bulletin O P B 88O July 1989 Replaces January 1988 OPTEK Slotted Optical Switches Types OPB 88O, OPB89Q Series Features A bsolute M axim um R atin gs Ta =2 5° C unless otherwise noted

OPB882

Abstract: OPB880 OPTEK slotted OPB890
Contextual Info: bT^asaa ooo dtsb 27 E D OPTEK TECHNOLOGY INC m OPTEK P rod uct B ulletin O P B 88 O J u ly 1989 R eplaces J anu ary 1988 Slotted Optical Switches Types OPB 88O, OPB89Q Series Package T Package P Package L Package N F eatures A b so lu te M axim um Ratings T a = 2 5 ° C unless otherwise noted

Contextual Info: FORM 4 .0 4 —0 0 1 A LTR R EVISION DATE 0 1 -2 5 -0 7 RELEASED 1.44 6.00±.50 P F 5 0 — OAG— 0 2 8 V —W6 AQUA GREEN 28 15 525 P F 5 0 — OCW— 0 2 8 V —W6 COOL WHITE 28 15 8000K P F 5 0 — OPB — 0 2 8 V —W6 S U P E R BLUE 28 15 470 P F 5 0 — OUO— 0 2 8 V —W6

IBM CoreConnect bus

Contextual Info: IBM Microelectronics TM CoreConnect Bus Architecture A 32-, 64-, 128-bit core on-chip bus standard Highlights The IBM CoreConnect bus architecture eases the integration and reuse of processor, system, and peripheral cores within standard product and custom