OCTOBER199 Search Results

PBL3764A

Abstract: ZTX 458 3764a fault detector in transmission line circuit diagram
Contextual Info: October1998 PBL 3764A/4, PBL 3764A/6 Subscriber Line Interface Circuit Description Key Features Note: All data is also valid for PBL 3764A/6, except maximum ratings for battery voltage. See next page The PBL 3764A/4 Subscriber Line Interface Circuit (SLIC) is a bipolar integrated

KESRX01

Abstract: 434M diode ring mixer phase detector
Contextual Info: KESRX01 M IT E L 290 - 460MHz ASK Receiver SEMICONDUCTOR This Supersedes March 1998 Edition DS3968 6.0 October1998 The KESRX01 is a single chip ASK Amplitude Shift Key Receiver IC. It is designed to operate in a variety of low power radio applications including keyless entry, general domestic

Contextual Info: ISSI •T 3T 51 *• > 1 IS 61C816 2 x 4K x 16, 8K X 16 HIGH SPEED CMOS CACHE RAM OCTOBER1990 DESCRIPTION FEATURES • PRELIMINARY The ISSI IS61C816 is fabricated by the double layer polysili­ con, double layer metal CMOS technolgy. It is specifically designed to provide direct interface to the 80386 32-bit CPU

WL102

Abstract: WL600C WL800
Contextual Info: WL800 2.5GHz Frequency Synthesiser Preliminary Information DS4583 1.6 October1997 The WL800 is a low power single chip frequency synthesiser. The circuit is fabricated on Mitel Semiconductor HG process and operates from a supply voltage of 2.7 - 3.6V. It is designed

Contextual Info: M ITEL _ S E M IC O N D U C T O R WL800 2.5GHz Frequency Synthesiser _ •■ ■ . x Prelim inary Inform ation DS4583 1.6 October1997 The WL800 is a low power single chip frequency synthesiser. The circuit is fabricated on Mitel Semiconductor HG process

SC160

Abstract: sc38* motorola sc40 motorola SC107 sc54 motorola SC169
Contextual Info: C R IM H M '“ OCTOBER199° CA91C896 FUTUREBUS+ ARBITER • Fully compatible with IEEE P896.1 -1 9 9 0 • IEEE 1149.1 JTAG testability port • TTL Input/output levels • Low power CMOS implementation • Futurebus* Interface - 254 level priority/round robin arbiter

RAM 2112 256 word

Abstract: A 69258 0398C 0804B c548 PAR16 spru288 TMS320C5xx transistor BC 945 transistor c548
Contextual Info: TMS320C548/C549 Bootloader and ROM Code Contents Technical Reference Literature Number: SPRU288A October1998 – Revised May 2000 Preface Read This First About This Manual This document describes the operation of the TMS320C548/C549 bootloader and the process used to select the operating mode. The document also provides source code for the bootloader and discusses the other on-chip ROM

hp 1458

Abstract: nc 1458 C227 LTC1458CG LTC1458CSW LTC1458IG LTC1458ISW LTC1458LCG LTC1458LCSW LTC1458LIG
Contextual Info: SPECIFICATION NOTICE LTC1458/LTC1458L October1997 The following versions of the LTC 1458/LTC1458L are now available in the industrial temperature range – 40°C to 85°C as indicated in Bold. All specifications remain unchanged. For complete specifications, typical performance curves and applications information, please see

LT1212

Abstract: SN1211
Contextual Info: SPECIFICATION NOTICE LT1211/LT1212 October1997 The following Electrical Characteristics note has changed on the LT 1211/LT1212 data sheet. Replace Note 5 with the new Note shown below. All other notes remain unchanged. For complete specifications, typical performance curves and applications information, please see the

pbl 3766 r2

Abstract: TP3054 1N4004 1N4454 ericsson slic
Contextual Info: October1998 PBL 3766, PBL 3766/6 Subscriber Line Interface Circuit Description Key Features The PBL 3766 Subscriber Line Interface Circuit SLIC is a monolithic integrated circuit, manufactured in 75 V bipolar technology. The PBL 3766 SLIC facilitates the

LTC1142

Contextual Info: SPECIFICATION NOTICE LTC1142 October1997 The following specification has changed on the LTC 1142 data sheet as indicated in bold. All other specifications remain unchanged. For complete specifications, typical performance curves and applications information, please see the LTC1142 data sheet.

Contextual Info: fflt/HHBT october199° CA91C897 FUTUREBUS+ INTERFACE UNIT • Fully com patible w ith IEEE P896.1 - 1 9 9 0 • IEEE 1149.1 JTAG testability port • TTL input/output levels • Low pow er CMOS im plem entation • F u tu re b u s* interface - P896.1 com pelled m ode data transfer protocol

IDT7M4084

Abstract: 7095 dip 7M4084
Contextual Info: PRELIMINARY IDT7M4084 2M x 8 CMOS STATIC RAM MODULE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • High-density 16 megabit 2M x 8 Static RAM module Equivalent to the JEDEC standard for future monolithic Fast access time: 55ns (max.)

KYS 30 40 diode

Abstract: 40n60 transistor mos 30N60 2355Z wiom DC IXYS 30N60 of ic 3915 1XYS 30N60T 35N100
Contextual Info: MbE 4bôb22b D I X Y S OGQQÔTM T H IX Y CORP □IXYS Data Book NO.91560A October 1991 "S" Series MOSIGBTs High Short Circuit SOA Insulated Gate Bipolar Transistor Features Guaranteed Short Circuit Capability SCSOA Low Input Capacitances Optimized for 60Hz to 30kHz Switching

FR07

Abstract: Block diagram on monochrome tv transmitter FR06 fr17 170M GP64 VP531 VP531E VP551E DS4573
Contextual Info: VP531E/VP551E NTSC/PAL Digital Video Encoder Advance Information Supersedes DS4573 1.4 May 1997 edition The VP531/VP551 converts digital Y, Cr, Cb, data into analog NTSC/PAL composite video and S-video signals The outputs are capable of driving doubly terminated 75

teflon M111

Abstract: SD1434 M111 Sprague logo
Contextual Info: SD1434 RF POWER BIPOLAR TRANSISTORS UHF MOBILE APPLICATIONS FEATURES SUMMARY • 470 MHz Figure 1. Package ■ 12.5 VOLTS ■ COMMON EMITTER ■ POUT = 45 W MIN. WITH 5.0 dB GAIN DESCRIPTION The SD1434 is a 12.5 V Class C epitaxial silicon NPN planar transistor designed primarily for UHF

SD1407

Abstract: vk200 VK-200 m174 5004LFL
Contextual Info: SD1407 RF POWER BIPOLAR TRANSISTORS HF SSB APPLICATIONS FEATURES SUMMARY • 30 MHz Figure 1. Package ■ 28 VOLTS ■ IMD –30 dB ■ COMMON EMITTER ■ GOLD METALLIZATION ■ POUT = 125 W MIN. WITH 15 dB GAIN DESCRIPTION The SD1407 is a 28 V epitaxial silicon NPN planar

D2Pak Package dimensions

Abstract: STB7NB40 STB7NB40T4
Contextual Info: STB7NB40 N-CHANNEL 400V - 0.75 Ω - 7.0A D2PAK PowerMESH MOSFET PRELIMINARY DATA Figure 1. Package Table 1. General Features Type VDSS RDS on ID STB7NB40 400 V < 0.9 Ω 7.0 A FEATURES SUMMARY • TYPICAL RDS(on) = 0.75 Ω 3 ■ EXTREMELY HIGH dv/dt CAPABILITY

SD1407

Abstract: vk200 VK-200 vk 200 SD140
Contextual Info: SD1407 RF POWER BIPOLAR TRANSISTORS HF SSB APPLICATIONS FEATURES SUMMARY • 30 MHz Figure 1. Package ■ 28 VOLTS ■ IMD –30 dB ■ COMMON EMITTER ■ GOLD METALLIZATION ■ POUT = 125 W MIN. WITH 15 dB GAIN DESCRIPTION The SD1407 is a 28 V epitaxial silicon NPN planar

PL021

Abstract: 0171B
Contextual Info: ARM PrimeCell Synchronous Serial Port Master and Slave PL021 Technical Reference Manual ARM DDI 0171B ARM PrimeCell™ Synchronous Serial Port Master and Slave (PL021) Technical Reference Manual Copyright ARM Limited 1999. All rights reserved. Release information

circuit diagram of automatic mains failure

Abstract: AVS12CB 110v 60 hz ac to 220v 50 hz ac inverter ac 220V Automatic Voltage controller CHARACTERISTICS DIODE 1N4007 triac control circuit 220v to 110v st triac condensator triac inverter ac 220V Automatic Voltage Regulator
Contextual Info: AN390 Application note How to use the AVS kit Introduction The AVS08, AVS10 and AVS12 are automatic mains voltage selectors to be used in online SMPS supplies with power up to 500 W. An AVS is made of two devices, a controller and an AC switch. The AC switch automatically modifies the structure of the input diode bridge in order to keep

MIFARE DESFire Implementation hints and example

Abstract: MIFARE plus cmac MF3ICD81 MIFARE DESFire EV1 Functional Specification Mifare PLUS X command set SOT658-1 MIFARE SAM AV2.6 0/Mifare PLUS X command set 2/Mifare 1k commands
Contextual Info: P5DF081 MIFARE SAM AV2 Rev. 3.0 — 18 October 2011 191730 Product short data sheet COMPANY PUBLIC 1. General description The NXP MIFARE SAM AV2 hardware solution is the ideal add-on for reader devices offering additional security services. Supporting TDEA, AES and RSA capabilities, it offers

MIFARE DESFire Implementation hints and example

Abstract: Mifare APDU Command Mifare plus commands MIFARE plus cmac SmartMX mifare plus functional specification desfire SAM programmer MIFARE SAM AV2.6 MIFARE DESFire EV1 MF3ICD81 Guidance, Delivery and Operation Manual 0/MIFARE DESFire Implementation hints and example
Contextual Info: P5DF081 MIFARE SAM AV2 Rev. 3.1 — 1 October 2012 191731 Product short data sheet COMPANY PUBLIC 1. General description The NXP MIFARE SAM AV2 hardware solution is the ideal add-on for reader devices offering additional security services. Supporting TDEA, AES and RSA capabilities, it offers

S46440

Contextual Info: TMS464409, TMS464409P, TMS465409, TMS465409P 16 777 216 BY 4-BIT EXTENDED DATA OUT DYNAMIC RANDOM-ACCESS MEMORIES _ SMKS895A - MAY 1997 - REVISED OCTOBER 1997 Organization . . . 16777216 by 4 Bits □GC PACKAGE TOP VIEW vcc[ Performance Ranges: