O64I Search Results

micro flex teradyne jtag

Abstract: MACH355 HI-LO ALL-07 542-0388 teradyne flex tester teradyne lasar HP3070 MACH111SP gate and pal architect
Contextual Info: MACH 4 FAMILY 1 FINAL COM’L: -15 IND: -18 Lattice Semiconductor MACH4-96/96-15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ 144 Pins in PQFP ◆ 96 Macrocells ◆ ◆ ◆ ◆ ◆ MACH 4 Family ◆ 15 ns tPD Commercial, 18 ns tPD Industrial

tms 3755

Abstract: M4-96/96 HI-LO ALL-07 HP3070 mach 1 family amd teradyne flex tester teradyne lasar MACH111SP MACH355 mach-355
Contextual Info: MACH 4 FAMILY 1 FINAL COM’L: -15 IND: -18 MACH4-96/96-15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ 144 Pins in PQFP ◆ 96 Macrocells ◆ ◆ ◆ ◆ ◆ MACH 4 Family ◆ 15 ns tPD Commercial, 18 ns tPD Industrial ◆ 47.6 MHz fCNT

mach-355

Abstract: MACH355-15 MACH355 mach355-20 mach 1 family amd teradyne lasar PAL22V10 mach 1 to 5 from amd mach 3 mach 3 family amd
Contextual Info: FINAL COM’L: -15/20 Advanced Micro Devices MACH355-15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 144 Pins in PQFP ■ Up to 20 product terms per function, with XOR ■ JTAG, 5-V, in-circuit programmable ■ Flexible clocking

CY7C375

Abstract: FLASH370
Contextual Info: 7C375: Thursday, September 24, 1992 Revision: October 14, 1995 CY7C375 UltraLogict 128ĆMacrocell Flash CPLD Features Functional Description D D D The CY7C375 is a Flash erasable Complex Programmable Logic Device CPLD and is part of the FLASH370t family of highĆ

CY7C375I

Abstract: cypress flash 370 O103
Contextual Info: PRELIMINARY CY7C375i UltraLogict 128ĆMacrocell Flash CPLD D D D 128 macrocells in eight logic blocks D InĆSystem Reprogrammable ISRt Flash technology 128 I/O pins 5 dedicated inputs including 4 clock pins Bus Hold capabilities on all I/Os and dedicated inputs

Contextual Info: fax id: 6141 1CP LD Fa mily Ultra37000 ISR™ CPLD Family PRELIMINARY UltraLogic™ High-Performance CPLDs • Warp2 —Low-cost IEEE 1076/1164-compliant VHDL system —Available on PC, Sun, and HP platforms for $99 —Supports all Cypress Programmable Products

MACH355

Abstract: HP3070 MACH111SP
Contextual Info: MACH 4 FAMILY 1 FINAL COM’L: -15 IND: -20 MACH4-96/96-15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ 144 Pins in PQFP ◆ 96 Macrocells ◆ ◆ ◆ ◆ ◆ MACH 4 Family ◆ 15 ns tPD Commercial, 20 ns tPD Industrial ◆ 47.6 MHz fCNT

lem la 100-P

Abstract: E1101
Contextual Info: Ultra37128 P R E U M IN A m UltraLogic 128-Macrocell ISR™ CPLD Features — t co = 4.5 ns P ro d uct-term clo ckin g • 128 m a cro c ells in eig h t logic blocks IEEE1149.1 JTAG b o u n d a ry scan • In-S ystem R e p ro g ra m m ab le IS R ™

CY3600

Abstract: 37128VP100
Contextual Info: fax id: 6147 1Ult ra371 28 V PRELIMINARY Ultra37128V UltraLogic 3.3V 128-Macrocell ISR™ CPLD Features • High speed — fMAX = 125 MHz • 128 macrocells in eight logic blocks • 3.3V In-System Reprogrammable ISR™ — JTAG compliant on board programming

CY37128P84-125JI

Abstract: Ultra37000TM CY3600 37128P100
Contextual Info: fax id: 6146 1Ult ra371 28 PRELIMINARY Ultra37128 UltraLogic 128-Macrocell ISR™ CPLD Features • High speed — fMAX = 167 MHz • 128 macrocells in eight logic blocks • In-System Reprogrammable ISR™ — JTAG compliant on board programming — tPD = 6.5 ns

CY37128

Abstract: CY37128V
Contextual Info: CY37128V PRELIMINARY i k v / kv, UltraLogicT M 3.3V 128-Macrocell ISR CLPD Features — tpD = ns — ts = 5.5 ns • 128 m a cro c ells in eig h t logic blocks — tc o = 6.5 ns • 3.3V In-S ystem R eprog ram m ab le™ IS R ™ • P ro d uct-term clocking

Contextual Info: CY37128V PRELIMINARY UltraLogic 3.3V 128-Macrocell ISR™CLPD — tPD = 10 ns Features — ts = 5.5 ns • 128 macrocells in eight logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.5 ns • • • • • • — JTAG-compliant on-board programming

architecture of cypress FLASH370 cpld

Abstract: cypress flash 370 cypress flash 370 device logic block diagram of cypress flash 370 device features cypress flash 370 architecture of cypress FLASH370 device cypress flash 370 CPLD cypress flash 370 device technology cypress FLASH370 logic
Contextual Info: fax id: 6130 1CY 7C37 5 For new designs see CY7C375i. CY7C375 UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 28 macrocells in eight logic blocks The CY7C375 is a Flash erasable Complex Programmable Logic Device CPLD and is part of the FLASH370™ family of

Contextual Info: PRELIMINARY CY37128 UltraLogic 128-Macrocell ISR™ CPLD Features • 128 macrocells in eight logic blocks • In-System Reprogrammable ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes — Design changes don’t cause timing changes

MACH465

Abstract: MACH465-12 PAL22V10 mach 1 family amd
Contextual Info: FINAL COM’L: -12/15/20 Advanced Micro Devices MACH465-12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 208 pins in PQFP ■ Up to 20 product terms per function, with XOR ■ JTAG, 5-V, in-circuit programmable ■ Flexible clocking