NATIONAL ELECTRONIC TUBE COMPANY Search Results

54ACT520DMQB/Q

Contextual Info: 54AC520 • 54ACT520 8-Bit Identity Comparator General Description The ’AC/’ACT520 are expandable 8-bit comparators. They compare two words of up to eight bits each and provide a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.

54AC521D

Contextual Info: 54AC521 • 54ACT521 8-Bit Identity Comparator General Description Features The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.

JM38510 Fairchild

Abstract: AC86 54AC86
Contextual Info: 54AC86 Quad 2-Input Exclusive-OR Gate General Description Features The ’AC86 contains four, 2-input exclusive-OR gates. n ICC reduced by 50% n Outputs source/sink 24 mA n Standard Military Drawing SMD — ’AC86: 5962-89550 Logic Symbol Connection Diagrams

9153101

Abstract: 100325DMQB Hex schmitt trigger ecl
Contextual Info: 100325 Low Power Hex ECL-to-TTL Translator General Description Features The 100325 is a hex translator for converting F100K logic levels to TTL logic levels. Differential inputs allow each circuit to be used as an inverting, non-inverting or differential receiver. An internal reference voltage generator provides VBB

54f164admqb

Contextual Info: 54F 74F164A Serial-In Parallel-Out Shift Register General Description Features The ’F164A is a high-speed 8-bit serial-in parallel-out shift register Serial data is entered through a 2-input AND gate synchronous with the LOW-to-HIGH transition of the clock

54AC10

Abstract: JM38510 fairchild
Contextual Info: 54AC10 Triple 3-Input NAND Gate General Description The ’AC10 contains three, 3-input NAND gates. Features n Outputs source/sink 24 mA n Standard Military Drawing SMD — ’AC10: 5962-87610 n For Military 54ACT10 device see the 54ACTQ10 n ICC reduced by 50% on 54AC only

Contextual Info: 54F 74F32 Quad 2-Input OR Gate General Description Features This device contains four independent gates each of which performs the logic OR function Y Commercial Guaranteed 4000V minimum ESD protection Package Number Military 74F32PC Package Description N14A

9520

Abstract: 54F11LMQB
Contextual Info: General Description This device contains three independent gates, each of which performs the logic AND function. Ordering Code: See Section 0 Commercial Military Package Package Description Number 74F11PC N14A 14-Lead 0.300" Wide Molded Dual-In-Line J14A

ds26ls31m

Abstract: 5962-7802301Q2A
Contextual Info: DS26LS31C/DS26LS31M Quad High Speed Differential Line Driver General Description Features The DS26LS31 is a quad differential line driver designed for digital data transmission over balanced lines. The DS26LS31 meets all the requirements of EIA Standard RS-422 and Federal Standard 1020. It is designed to provide

74F169PC

Contextual Info: 54F 74F169 4-Stage Synchronous Bidirectional Counter General Description Features The ’F169 is a fully synchronous 4-stage up down counter The ’F169 is a modulo-16 binary counter Features a preset capability for programmable operation carry lookahead for

Contextual Info: 54ACT399 Quad 2-Port Register General Description Features The ’AC/ACT399 is the logical equivalent of a quad 2-input multiplexer feeding into four edge-triggered flip-flops. A common Select input determines which of the two 4-bit words is accepted. The selected data enters the flip-flop on the rising

fct574

Abstract: national marking code 883b
Contextual Info: 54FCT574 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’FCT574 is an octal flip-flop with a buffered common Clock CP and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the

act573

Contextual Info: 54ACT573 Octal Latch with TRI-STATE Outputs General Description Features The ’ACT573 is a high-speed octal latch with buffered common Latch Enable LE and buffered common Output Enable (OE) inputs. n ICC and IOZ reduced by 50% n Inputs and outputs on opposite sides of package

Comlinear Corporation clc502

Abstract: smd transistor 2T 2AJE
Contextual Info: N CLC502 Clamping, Low-Gain Op Amp with Fast 14-bit Settling General Description Features • ■ ■ ■ Output clamping with fast recovery 0.0025% settling in 25ns 32ns max. Low power, 170mW Low distortion. -50dBc at 20MHz Applications ■ ■ ■ ■

Contextual Info: 54AC521 • 54ACT521 8-Bit Identity Comparator General Description Features The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.

5962-8995001MFA

Abstract: 5962-8995001B2A smd SD1
Contextual Info: 54ACT112 Dual JK Negative Edge-Triggered Flip-Flop General Description The ’ACT112 contains two independent, high-speed JK flip-flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly

Contextual Info: 54AC520 • 54ACT520 8-Bit Identity Comparator General Description The ’AC/’ACT520 are expandable 8-bit comparators. They compare two words of up to eight bits each and provide a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.

act175

Abstract: 54ACT175DMQB
Contextual Info: 54AC175 • 54ACT175 Quad D Flip-Flop General Description The ’AC/’ACT175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW-to-HIGH clock transition. Both

Contextual Info: 54AC257 • 54ACT257 Quad 2-Input Multiplexer with TRI-STATE Outputs General Description Features The ’AC/’ACT257 is a quad 2-input multiplexer with TRI-STATE outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four

Contextual Info: 54AC109 • 54ACT109 Dual JK Positive Edge-Triggered Flip-Flop Simultaneous LOW on CD and SD makes both Q and Q General Description The ’AC/’ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock

JM54ACT151S2A-R

Abstract: 54ACT151FMQB
Contextual Info: 54AC151 • 54ACT151 8-Input Multiplexer General Description Features The ’AC/’ACT151 is a high-speed 8-input digital multiplexer. It provides, in one package, the ability to select one line of data from up to eight sources. The ’AC/’ACT151 can be used

CLC402AJE

Abstract: CLC402A
Contextual Info: N CLC402 Low-Gain Op Amp with Fast 14-Bit Settling General Description Features • ■ ■ ■ ■ 0.0025% settling in 25ns 32ns max 0.5mV input offset voltage, 3µV/°C drift ±1 to ±8 closed-loop gain range Low power, 150mW 0.01%/0.05° differential gain/phase

E27014

Contextual Info: 54AC377 • 54ACT377 Octal D Flip-Flop with Clock Enable General Description The ’AC/’ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.

863ac

Abstract: 54F374FMQB 54F374
Contextual Info: 54F 74F374 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’F374 is a high-speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications A buffered Clock CP and Output Enable (OE) are common to all