MT D FLIP- FLOP Search Results

74HCTLS

Contextual Info: Z v t r e ZX54HCTLS ZX74HCTLS x £ 1 MT Octal D-Type Flip-Flops with 3-State Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family ■ Low power consumption characteristic of

Contextual Info: TC74VCX16374FT TOSHIBA TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT T• f 7 m4 U a w f Y mm 1 K 1 SILICON MONOLITHIC 7 m d m F mT m Mr LOW-VOLTAGE 16-BIT D-TYPE FLIP-FLOP WITH 3.6V TOLERANT INPUTS AND OUTPUTS The TC74VCX16374FT is a h ig h p erfo rm a n ce CMOS 1 6-bit

74LV174

Abstract: 74LV174D 74LV174N
Contextual Info: N A P C / P H I L I P S SEMICONP Knmps sem iconductors Mt b b S m 2 4 00Ô37Ô3 ESb » S I C 3 t>3E D Product Specification Hex D-type flip-flop with reset; positive-edge trigger 74LV174 QUICK REFERENCE DATA GND = 0 V; T ^ = 25°C; tr = t, < 2.5 ns FEATURES

gray code counter

Abstract: MC663
Contextual Info: Order this document MC663 MC12663 ISSUE A The MC663 and the MC12663 consist o f tw o J-K flip-flops having direct reset inputs in addition to clocked inputs. The 15 vo lt V q c de­ vice MC663 and the extended 12-15 v o lt V q c device (MC12663), are schematically indentical The MC12663 meets the MC663 specifi­

wd37c65b

Contextual Info: WD57C65 INTRODUCTION 1.0 INTRODUCTION 1.1 FEATURES interfaces with three 5.25 or 3.5-inch floppy disk drives. It is available in a 40-pin, totally encapsu­ lated plastic DIP or a 44-pin PLCC package. The WD57C65 retains the core of the WD37C65B floppy disk controller so that the Micro-Sequencer

MAGNETIC SWITCH

Abstract: MLX90224BA A3422KA hall effect latch MLX90224LVA 410 hall
Contextual Info:

           • ■ ■ ■ ■ ■ Chopper Stabilized Amplifier Stage CMOS for Optimum Stability, Quality and Cost Dual Output 4.5V to 28V Operation Phase/Direction Detection B Pulse Doubling Output (C)    

ne555cn

Abstract: NE555C samsung timer ne555
Contextual Info: NE555C LINEAR INTEGRATED CIRCUIT SINGLE TIMER The NE555 is a highly stable controller capable of producing accurate tim ing pulses. W ith monostable operation, the tim e delay is con­ trolled by one external and one capacitor. W ith astable operation, the frequency and duty cycle are accurately controlled with two

wd37c65b

Abstract: floppy controller stepper motor
Contextual Info: WD57C65 INTRODUCTION 1.0 INTRODUCTION 1.1 FEATURES 1.2 DESCRIPTION The W D57C65 Floppy Disk Subsystem Controller is an LSI device which incorporates all the func­ tional blocks that typically make up a floppy disk subsystem controller, such as the form atter/con­

NE555CN

Abstract: IC NE555c NE555C IC NE555 LSOU Ne555 ic NE555 sop 8 NE555CD NE555 NE556
Contextual Info: LINEAR INTEGRATED CIRCUIT NE555C s DIP SINGLE TIMER The NE555 is a highly stable controller capable of producing accurate timing pulses. With monostable operation, the time delay is con­ trolled by one external and one capacitor. With astable operation, the frequency and duty cycle are accurately controlled with two

Contextual Info: SN54AS825, SN54AS826 SN74AS825, SN74AS826 8 BIT BUS INTERFACE FLIP FLOPS WITH 3-STATE OUTPUTS D 2 8 2 5 , JUNE 1 9 8 4 -R E V IS E D JA N U A R Y 1 9 8 6 Functionally Equivalent to A M D 's A M 2 9 8 2 5 and A M 2 9 8 2 6 SNS4A S825 . . . JT PACKAGE S N 74A S825 . . . DW OR NT PACKAGE

MC68B21CP

Abstract: xcm916x1cth16 transistor marking code 12W SOT-23 sg379 MC68B54P XC68HC805P18CDW mc68b50cp MC2830 NE555N CHN NE555N
Contextual Info: SG379/D REV 7 Semiconductor Products Sector NORTH AMERICA SALES AND DISTRIBUTION PRICE LIST THIS BOOK IS IN COMPUTER SORT PRODUCT CLASSIFICATION – Please see General Information Section 1.3 EFFECTIVE DATE: JANUARY 10, 1998 General Information 1 Cross References

U016

Abstract: 74HC273
Contextual Info: R C H I I - P S E M I C O N D U C T O R -n 74VH C 273 Octal D Flip-Flop General Description The VH C273 is an advanced high speed CM OS Octal D-type flip-flop fabricated with silicon gate CM OS te ch n ol­ ogy. It achieves the high speed operation sim ilar to equ iva ­

MTC5585D

Abstract: MTC5615 C5585 APD 1300 2,5 GHz
Contextual Info: MIXED SIGNAL INTEGRATED CIRCUIT PRODUCTS MTC1215 Product Data Sheet 12.5 Gb/s 16-Bit SiGe MUX Applications • Very long haul telecom transmission systems • SONET OC-192 and SDH STM-64 equipment • Forward Error Correction data rates up to 12.5 Gb/s Features

Contextual Info: H D 74LS 190 •Syn chron ou s U p /D o w n Decade Counters single clock line Synchronous operation is provided by having all flip>flops clocked simultaneously so that the outputs change coinci­ dent w ith each other when so instructed by the steering logic.

ne555 vco

Abstract: NE555CN NE555C NE555CD IC NE555c ne556 application NE555 NE556 samsung timer ne555
Contextual Info: SAMSUNG ELEC TRONICS INC 4 HE 5 711*4142 □□0=143=] 0 HUSflGK LINEAR INTEGRATED CIRCUIT NE555C SINGLE TIMER The NE555 is a highly stable controller capable of producing accurate timing pulses. With monostable operation, the time delay Is controlled by one external and one capacitor. With astable operation,

wd37c65b

Abstract: WD57C65
Contextual Info: WD57C65 INTRODUCTION 1.0 INTRODUCTION 1.1 FEATURES 1.2 • IBM PS/2 and IBM PC XT Compatible • 100% Software Compatible with W D37C65B • Integrated High Performance DPLL Data Separator — <1OE-9 industry standard error rates — Data rates of 125, 250, 300, 500

7476N

Abstract: tir 101a 6476N FJJ191 FJJ191A FJJ196 16-mA TTL 7476N TO74 package
Contextual Info: T.T.L. D U A L M A ST E R -SLA V E JK FLIP-FLOPS W IT H PRESET A N D CLEAR F J II9 I Ell 101A C| 11QA Correspond to 74 Series types 7476N, 6476N ^ TENTATIVE DATA T h ese d evices a r e tr a n s is to r - tr a n s is to r logic dual JK m a s te r-s la v e flip flops, w ith p r e s e t and c le a r inputs, in the F J s e r ie s of in te g rate d c irc u its .

1500w audio amplifier circuit

Abstract: Schottky Diode 80V 6A 1500w PWM 220v C106MG marking code SS SOT23 tl494cn inverter datasheet smps 1500W MMSZ5231BT1G dc 220v motor speed control circuit with scr NCP1200P60G
Contextual Info: SGD501/D REV 19, October 9, 2004 NORTH AMERICA SALES AND DISTRIBUTION ON Semiconductor PRICE BOOK THIS BOOK IS IN COMPUTER SORT PRODUCT CLASSIFICATION − Please see General Information Section EFFECTIVE DATE: OCTOBER 9, 2004  General Information ON Semiconductor Standard Policies

10h116

Abstract: C37DRPF 10h116 datasheet 5962-9756301HXC AD820 AD9070 AD9070BR AD9070DIP ad780n C37D
Contextual Info: a FEATURES 10-Bit, 100 MSPS ADC Low Power: 600 mW Typical at 100 MSPS On-Chip Track/Hold 230 MHz Analog Bandwidth SINAD = 54 dB @ 41 MHz On-Chip Reference 1 V p-p Analog Input Range Single Supply Operation: +5 V or –5 V Differential Clock Input Available in Standard Military Drawing Version

10H116

Abstract: AD780N C37DRPF 10H176
Contextual Info: BACK a FEATURES 10-Bit, 100 MSPS ADC Low Power: 600 mW Typical at 100 MSPS On-Chip Track/Hold 230 MHz Analog Bandwidth SINAD = 54 dB @ 41 MHz On–Chip Reference 1 V p-p Analog Input Range Single Supply Operation: +5 V or –5 V Differential Clock Input Available in Standard Military Drawing Version

Contextual Info: 10-Bit, 100 MSPS A/D Converter AD9070 a FEATURES 10-Bit, 100 MSPS ADC Low Power: 600 mW Typical at 100 MSPS On-Chip Track/Hold 230 MHz Analog Bandwidth SINAD = 54 dB @ 41 MHz On-Chip Reference 1 V p-p Analog Input Range Single Supply Operation: +5 V or –5 V

PD765A

Abstract: mPD765A PD765 d765a D765B p0765 mark 1AM PD765AC-2 pro/765A
Contextual Info: W FC »irn n • //P D 7 6 5 A //J » D 7 6 5 B S in g le /D o u b le Density Floppy-Disk C ontroller i NEC Electronics Inc. D e s c rip tio n F e a tu re s The jjPD76 5 A /B is an LSI flo p p y d isk co n tro lle r FDC ch ip w h ich co n ta in s th e c irc u itry and co n tro l fu n c tio n s

10H116

Abstract: ad780n C2996 10h116 datasheet 5962-9756301HXC AD820 AD9070 AD9070BR AD9070DIP C37DRPF
Contextual Info: a FEATURES 10-Bit, 100 MSPS ADC Low Power: 600 mW Typical at 100 MSPS On-Chip Track/Hold 230 MHz Analog Bandwidth SINAD = 54 dB @ 41 MHz On–Chip Reference 1 V p-p Analog Input Range Single Supply Operation: +5 V or –5 V Differential Clock Input Available in Standard Military Drawing Version

10h116

Abstract: 10h116 datasheet 5962-9756301HXC AD820 AD9070 AD9070BR AD9070TD C2996
Contextual Info: a FEATURES 10-Bit, 100 MSPS ADC Low Power: 600 mW Typical at 100 MSPS On-Chip Track/Hold 230 MHz Analog Bandwidth SINAD = 54 dB @ 41 MHz On–Chip Reference 1 V p-p Analog Input Range Single Supply Operation: +5 V or –5 V Differential Clock Input Available in Standard Military Drawing Version