MS1028 Search Results

PAL26V16

Abstract: teradyne lasar
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 Z I Advanced Micro Devices M A C H 1 3 0 - 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 4 clock choices ■ 15 ns tpD Commercial

Contextual Info: FINAL COM’L: -7.5/10/12/15/20 a Advanced Micro Devices M A C H 1 3 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ Programmable power-down mode 64 Outputs 64 Flip-flops; 4 clock choices

mach 3 family amd

Abstract: circuit diagram of QS 8005 PAL26V16 D750 MACH110 MACH210 MACH215 PAL22V10 mach 1 family amd NS4N
Contextual Info: FINAL COM’L: -7.5/10/12/15/20 IND: -10/12/14/18/24 M A C H 2 1 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic Z I Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ Programmable power-down mode ■ 32 Outputs

mach231sp

Contextual Info: COM’L: -10/12/15/20 IND: -12/14/18/24 M A C H 2 3 1 S P - 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS In-System Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • JTAG-Compatible, 5-V in-system programming ■ 100 Pins ■ Peripheral Component Interconnect PCI

Contextual Info: FIN AL M A C H 1 1 1 COM’L: -5/7.5/10/12/15/20 IND: -7.5/10/12/14/18/24 AM D£t F a m ily High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tPD ■ 32 Flip-flops; 4 clock choices

O-81-4

Abstract: MACH211SP MACH110 MACH111SP PALCE22V10 MACH111SP-10JC PALCE* programming
Contextual Info: FINAL COM’L: -5/7.5/10/12/15 IND: -7.5/10/12/14/18 MACH111SP-5/7/10/12/15 High-Density EE CMOS Programmable Logic V A N T I S The Programmable Logic Company From AMD DISTINCTIVE CHARACTERISTICS • JTAG-Compatible, 5-V in-system programming ■ Programmable power-down mode

MACH120

Abstract: mach 3 family amd AMD Graphics schematics PAL26V12 mach 1 to 5 from amd mach 1 family amd teradyne lasar MACH220 PAL22V10 mach schematic
Contextual Info: FINAL COM’L: -12/15/20 IND: -18/24 Advanced Micro Devices MACH120-12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 68 Pins 56 Inputs 48 Macrocells 48 Outputs 12 ns tPD Commercial 18 ns tPD Industrial 48 Flip-flops; 4 clock choices

MACHpro

Abstract: tico 732 MACH230 PAL22V10 MACH231SP20
Contextual Info: FINAL COM’L: -10/12/15/20 IND: -12/14/18/24 MACH231SP-10/12/15/20 High-Density EE CMOS In-System Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • ■ ■ ■ JTAG-Compatible, 5-V in-system programming 100 Pins 128 Macrocells 10-ns tPD Commercial

BP1148

Abstract: mach 1 family amd MACH120 MACH220 PAL22V10 PAL26V12
Contextual Info: FINAL COM’L: -7/10/12/15/20 IND: -10/-12/14/18/24 MACH221 Family High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 68 Pins 96 Macrocells 7.5 ns tPD 133 MHz fCNT 56 Bus-Friendly Inputs and I/Os Programmable power-down mode Peripheral Component Interconnect PCI

MS1025

Abstract: Temperature to 0-10V MS1027 MS1024 MS1026 MS1028
Contextual Info: S/TOF Series S/TOF Series S/TOF Series S/TOF Series MS/TOF Series MS/TOF Series Time-of-Flight Mass Spectrometry Power Supplies MS/TOF Series Dual Polarity, High Stability, Low Ripple MS/TOF Series High Voltage Power Supply s e ri e S F O /T S M MS/TOF Series

PAL26V12

Abstract: mach schematic turpro-1 teradyne lasar MACH120 MACH220 PAL22V10
Contextual Info: FINAL COM’L: -10/12/15/20 IND: -14/18/24 Advanced Micro Devices MACH220-10/12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 68 Pins 48 Outputs 96 Macrocells 96 Flip-flops; 4 clock choices 10 ns tPD 8 “PAL26V12” blocks with buried macrocells

Contextual Info: FINAL COM’L: -12/15/20 ZI M A C H 4 4 5 - 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 100-pin version of the MACH435 in PQFP Up to 20 product terms per function, with XOR ■ 5 V, in-circuit programmable

MS300-24

Abstract: ms-11-24 MS-9-24 lambda MS-9 MS1124 MS1015 ms95 MS1115 MBW-1205-22 MS 3A
Contextual Info: LAMBDAA DENSEI-LAMBDA M S - series m ttS*30W ~ 300W MS-9-5 7" S g a j* « Œ mmí SVÍb^Bf 5VW »I) 5VfcB*Bf) 5Vttl*B§) ì / U - X '€ lïS ü • S g ^ fììn M P M R ÌR ^ » • ^ B lC » ÌÌA C /D C i^ A ^ I • À ^IŒIbH :AC85-132V/DC90-165V • M & S â îf iiL

Contextual Info: F IN A L COM’L :-10/15/20 IND:-18/24 a Advanced Micro Devices M A C H 2 3 0 - 1 0 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 128 Macrocells ■ 128 Flip-flops; 4 clock choices ■ 10 ns tpD Commercial

MS1028

Abstract: MACH130-20 MACH130 teradyne lasar MACH230 PAL22V10 mach 1 to 5 from amd MACH Programmer mach 1 family amd PAL26V16
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 Advanced Micro Devices MACH130-15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 84 Pins 64 Outputs 64 Macrocells 64 Flip-flops; 4 clock choices 15 ns tPD Commercial 18 ns tPD Industrial 4 “PAL26V16” Blocks

mach-355

Abstract: MACH355-15 MACH355 mach355-20 mach 1 family amd teradyne lasar PAL22V10 mach 1 to 5 from amd mach 3 mach 3 family amd
Contextual Info: FINAL COM’L: -15/20 Advanced Micro Devices MACH355-15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 144 Pins in PQFP ■ Up to 20 product terms per function, with XOR ■ JTAG, 5-V, in-circuit programmable ■ Flexible clocking

PPI-0223

Abstract: MACH130 PALCE22V10 Tag c0 665 800 MACH131sp
Contextual Info: PRELIMINARY COM’L: -5/7.5/10/12/15 IND: -7.5/10/12/14/18 MACH131SP-5/7/10/12/15 High-Density EE CMOS In-System Programmable Logic V A N T I S The Programmable Logic Company From AMD DISTINCTIVE CHARACTERISTICS • JTAG-compatible, 5-V in-system programming

teradyne

Abstract: teradyne lasar MACH130 MACH230 PAL22V10
Contextual Info: FINAL MACH231-6 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 84 Pins Programmable power-down mode 128 Macrocells 64 Outputs 6 ns tPD 128 Flip-flops; 4 clock choices 166 MHz fCNT 8 “PAL32V16” blocks with buried macrocells 70 Bus-Friendly Inputs

MACH445

Abstract: mach445 family amd teradyne tester test system mach445 Mach435 PAL22V10 mach 3 family amd
Contextual Info: FINAL COM’L: -12/15/20 Advanced Micro Devices MACH445-12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 100-pin version of the MACH435 in PQFP ■ Up to 20 product terms per function, with XOR ■ 5 V, in-circuit programmable

BP1148

Abstract: MACH111-20JC MACH110 MACH210 MACH215 PAL22V10
Contextual Info: FINAL COM’L: -5/7.5/10/12/15/20 IND: -7.5/10/12/14/18/24 MACH111 Family High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tPD ■ 32 Flip-flops; 4 clock choices

Contextual Info: FINAL IND: -10/12/14/18/24 COM’L: -7.5/10/12/15/20 a Advanced Micro Devices M A C H 2 1 1 -7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64Macrocells ■ Programmable power-down mode ■ 7.5 ns î p d Commercial

gg3b

Contextual Info: FINAL COM’L: -5/7.5/10/12/15/20 a Advanced Micro Devices M A C H 1 11 -5 /7 / 1 0 / 1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tpD

mach435

Contextual Info: FIN A L COM’L: -12/15/20, Q-20/25 Advanced Micro Devices MACH435-12/15/20, Q-20/25 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Flexible clocking ■ 84 Pins in PLCC ■ 128 Macrocells ■ — Four global clock pins with selectable edges

Contextual Info: FINAL COM’L: -12/15/20 IND: -18/24 a Advanced Micro Devices M A C H 1 2 0 -1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 56 Inputs ■ 48 Macrocells ■ 48 Outputs ■ 12 ns tPDCommercial 18 ns tpD Industrial