MS010 Search Results

fn155

Abstract: transistor fn155 ca224e 12v to 230v inverters circuit diagrams 12v to 230v inverters 24v to 230v inverters circuit 12V 230V Inverter Diagram CA3224E FN1553 gun diode bias symbol
Contextual Info: CA3224E NO R DUCT E NT E PRO T E L O LACEM P E OBS DataDSheet R ED MEN ECOM October 2002 FN1553.2 Automatic Picture Tube Bias Control Circuit Features Description • Automatic Background Color Balance The CA3224E is an automatic picture tube bias control circuit used in color TV receiver CRT drive circuits. It is used to

VQFN28

Abstract: DIP18 DIP20 DIP32 SDIP28 jedec MS-013 QFP100-P-1420
Contextual Info: パッケージコード一覧 ４．パッケージコード一覧（NJRCコード vs. EIAJコード対応） 当データブックではパッケージコードとして新日本無線パッケージコードを記載しておりますが、EIAJパッケージコードとの対応は下記一

100314

Abstract: 100314PC 100314QC 100314QI 100314SC F100K M24B MO-047 MS-013 N24E
Contextual Info: Revised August 2000 100314 Low Power Quint Differential Line Receiver General Description Features The 100314 is a monolithic quint differential line receiver with emitter-follower outputs. An internal reference supply VBB is available for single-ended reception. When used in

MM74C912N

Abstract: MM74C912 3.5 digit 7 segment display 28 pin configuration "write only memory" N28B bcd 1 digit 7 segment display pin configuration 4 digit 7 segment decoder DS005916
Contextual Info: Revised January 1999 MM74C912 6-Digit BCD Display Controller/Driver General Description The MM74C912 display controllers are interface elements, with memory, that drive a 6-digit, 8-segment LED display. The display controllers receive data information through 5

100302PC

Abstract: 100302QC 100302QI 100302SC M24B MO-047 MS-013 N24E V28A
Contextual Info: Revised August 2000 100302 Low Power Quint 2-Input OR/NOR Gate General Description Features The 100302 is a monolithic quint 2-input OR/NOR gate with common enable. All inputs have 50 kΩ pull-down resistors and all outputs are buffered. • 43% power reduction of the 100102

DIODE IN4007 specifications in english

Abstract: DIODE(IN4007) datasheet PBL3764A HC5523 HC5523IM HC5523IP in4007diode
Contextual Info: CT O D U EM EN T R P TE AC O LE E PL O B S N D ED R E 515 OM M Data Sheet HC5 R EC LSSGR/TR57 CO/Loop Carrier SLIC with Low Power Standby FN4144.6 • DI Monolithic High Voltage Process The HC5523 is fabricated in a High Voltage Dielectrically Isolated DI Bipolar Process that eliminates leakage

100325PC

Abstract: F100K M24B MO-047 MS-013 N24E V28A 100325QC 100325QI 100325SC
Contextual Info: Revised August 2000 100325 Low Power Hex ECL-to-TTL Translator General Description Features The 100325 is a hex translator for converting F100K logic levels to TTL logic levels. Differential inputs allow each circuit to be used as an inverting, non-inverting or differential

100353PC

Abstract: 100353QC 100353QI MO-047 N24E V28A
Contextual Info: Revised August 2000 100353 Low Power 8-Bit Register General Description Features The 100353 contains eight D-type edge triggered, master/ slave flip-flops with individual inputs Dn , true outputs (Qn), a clock input (CP), and a common clock enable pin (CEN).

100323PC

Abstract: 100323QC F100K MO-047 N24E V28A
Contextual Info: Revised August 2000 100323 Low Power Hex Bus Driver General Description Features The 100323 is a monolithic device containing six bus drivers capable of driving terminated lines with terminations as low as 25Ω. To reduce crosstalk, each output has its own

Contextual Info: February 1984 Revised February 1999 S E M I C O N D U C T O R TM MM74HC4514 4-to-16 Line Decoder with Latch General Description four select inputs determ ine w hich output will go HIGH pro­ vided the IN H IBIT input is LOW. If th e IN H IBIT input is HIGH all outputs are held LOW thus disabling the decoder.

AK5380VT

Abstract: Ak5380 AK5353 AKD5380
Contextual Info: ASAHI KASEI [AK5380] AK5380 96kHz 24Bit ∆Σ ADC with Single–ended Input GENERAL DESCRIPTION The AK5380 is a stereo A/D Converter with wide sampling rate of 4kHz~96kHz and is suitable for Highend audio system. The AK5380 achieves high accuracy and low cost by using Enhanced dual bit ∆Σ

amo package

Abstract: 4L56
Contextual Info: FINAL COM’L : -7/10/15 PAL22V10 Family, AmPAL22V10/A 24-Pin TTL Versatile PAL Device Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • As fast as 7.5-ns propagation delay and 91 MHz fn/iA x external ■ 10 Macrocells programmable as registered or

usb mic

Abstract: AK5371AVQ AKD5371 usb/mic diode My AK5371A AK93C45A AK93C55A AK93C65A AKAK5371A MIC CRYSTAL 20.000
Contextual Info: [AK5371A] ASAHI KASEI AK5371A 2ch A/D Converter with USB I/F Features: General Description „ USB-IF Certified The AK5371A is stereo A/D converter with USB I/F. The AK5371A integrates USB serial interface engine, USB transceiver, audio class processing unit, endpoints, and high

16-Bit Parallel-out Serial-in Shift Register

Abstract: 74F675A 74F675APC 74F675ASC 74F675ASPC M24B MS-013 N24A N24C
Contextual Info: Revised August 1999 74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register General Description Features The 74F675A contains a 16-bit serial in/serial out shift register and a 16-bit parallel out storage register. Separate serial input and output pins are provided for expansion to

HC5515CM

Abstract: HC5515 HC5515CP HC5515IM HC5515IP PBL3860 ERICSSON PABX la 42352 RDC2
Contextual Info: HC5515 S E M I C O N D U C T O R SLIC Subscriber Line Interface Circuit June 1997 Features Description • DI Monolithic High Voltage Process The HC5515 is a subscriber line interface circuit which is interchangeable with Ericsson’s PBL3860 for distributed

100329PC

Abstract: 100329QC 100329QI MO-047 N24E V28A
Contextual Info: Revised August 2000 100329 Low Power Octal ECL/TTL Bidirectional Translator with Register General Description Features The 100329 is an octal registered bidirectional translator designed to convert TTL logic levels to 100K ECL logic levels and vice versa. The direction of the translation is determined by the DIR input. A LOW on the output enable input

100354PC

Abstract: 100354QC 100354QI MO-047 N24E V28A
Contextual Info: Revised August 2000 100354 Low Power 8-Bit Register with Cut-Off Drivers General Description The 100354 contains eight D-type edge triggered, master/ slave flip-flops with individual inputs Dn , true outputs (Qn), a clock input (CP), an output enable pin (OEN), and a common clock enable pin (CEN). Data enters the master when

Contextual Info: D P n l 1 9 H8 M QQQ Revised Marchh i1999 SEMICONDUCTOR TM 74F543 Octal Registered Transceiver General Description Features T h e F543 octal tra n sce ive r contains tw o sets of D-type latches fo r tem porary storage of d ata flow ing in either direction. S eparate Latch Enable and O utput Enable inputs

100391PC

Abstract: 100391QC 100391QI 100391SC F100K M24B MO-047 MS-013 N24E V28A
Contextual Info: Revised August 2000 100391 Low Power Single Supply Hex TTL-to-PECL Translator General Description Features The 100391 is a hex translator for converting TTL logic levels to F100K PECL logic levels. The unique feature of this translator, is the ability to do this translation using only one

mpc560xb bolero

Abstract: MPC5606B CHN 949 transistor BC 247 LINFlex PROTOCOL linflex MPC560xB "Base Station subsystem 30f131 pj 989
Contextual Info: Devices Supported: MPC5607B MPC5607BRM Rev. 5 31 Jan 2010 MPC5607B Microcontroller Reference Manual, Rev. 5 Freescale Semiconductor Preliminary—Subject to Change Without Notice 1 Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available

74AC821

Abstract: 74AC821SC 74AC821SPC 74ACT821 74ACT821MTC 74ACT821SC 74ACT821SPC AM29821
Contextual Info: Revised December 1998 74AC821 • 74ACT821 10-Bit D-Type Flip-Flop with 3-STATE Outputs General Description Features The AC/ACT821 is a 10-bit D-type flip-flop with 3-STATE outputs arranged in a broadside pinout. • 3-STATE outputs for bus interfacing The AC/ACT821 is functionally identical to the AM29821.

DM93S41

Abstract: DM93S41N N24A MAX PLUS II free alu
Contextual Info: Revised May 2000 DM93S41 4-Bit Arithmetic Logic Unit General Description The DM93S41 4-bit arithmetic logic units can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations; the Add and Subtract modes are the most important.

Contextual Info: Revised August 2000 100331 Low Power Triple D-Type Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset

Contextual Info: Revised August 2000 100351 Low Power Hex D-Type Flip-Flop General Description Features The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPb and common Master Reset (MR) input. Data enters a master when both CPa