MONOLITHIC MEMORIES PROM PROGRAMMING Search Results

53DA441

Abstract: 53DA442 63DA441 63DA442 D442 Monolithic Memories PROM programming MONOLITHIC MEMORIES PROM
Contextual Info: 1 0 2 4 x 4 Diagnostic Registered PROM 5 3 /6 3 D A 4 4 1 5 3 /6 3 D A 4 4 2 Enables and Output Initialization Features/Benefits • Programmable asynchronous output initialization • Three-state outputs with two enables • Provides system diagnostic testing with system

MMI PAL14L8

Abstract: PAL20L10 MMI PAL20X10 MMI MMI DATE CODE PAL 53RA1681 PAL16R6 MMI
Contextual Info: M ilitary PAL Devices Q uality Programs The Military Product Division quality system conforms to the following Mil-Standards: Mil-M-38510, Appendix A, “Product Assurance Program" Mil-Q-9858, "Quality Program Requirements” Mil-l-45208, "Inspection System Requirements”

63S1681

Abstract: monolithic memories 53S1681 63S1681A 2048x8 53S1681A Monolithic Memories PROM programming
Contextual Info: High Performance 2 0 4 8 x 8 PROM TiW PROM Fam ily 53 /63S 1681 5 3 /6 3 S 1 6 8 1 A Features/Benefits Description • 35-ns maximum access time The 53/63S1681 is a high-speed 2Kx8 PROM which uses industry standard package and pin out. In addition, the device is

MMI 6309

Abstract: mmi 5349-1 MMI 63xx 6309-1 mmi 6349-1 6308 prom 6341 prom
Contextual Info: Generic NiCR PROM Fam ily 5 3 /6 3 X X -1 5 3 /6 3 X X -2 Features/Benefits Description • From 2048-bit to 8192-bit memory The 53/63XX series generic PROM fam ily offers a wide selection of size and organizations. The 8-bit wide PROMs range from 256x8 to 1024x8 in a wide selection of package sizes including the

128x128

Abstract: 63S1641 53S1641 53S1641A 63S1641A
Contextual Info: High Performance 4096x4 PROM TiW PROM Fam ily 53/63S1641 53/63S1641A Features/Benefits Description • 35-ns maximum access time The 53/63S1641 features low input current PNP inputs, full Schottky clamping and three-state outputs. The titaniumtungsten fuses store a logical low and are programmed to the

Monolithic Memories

Abstract: S485A 512x8 53S485 63S485 63S841
Contextual Info: High Performance 512x8 PROM TiW PROM Fam ily 5 3 /6 3 S 4 8 5 Features/Benefits Description • Upward pinout-compatible with higher density PROMs The 53S485 and 63S485 are 512x8 bipolar PROMs featuring low current PNP inputs, full Schottky clam ping, and three-state

programming TiW PROMs

Abstract: Monolithic Memories PROM programming jbp28l22
Contextual Info: IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current and complete.

Contextual Info: High Performance 5 1 2 x 8 PROM TiW PROM Family 5 3 /6 3 S 4 8 0 5 3 /6 3 S 4 8 1 5 3 /6 3 S 4 8 1 A Features/ Benefits Description • 30 ns maximum access time The 53/63S480 and 53/63S481/A are 512x8 bipolar PROMs featuring low input current PNP inputs, full Schottky clamping,

53S241

Abstract: 63S241 Monolithic Memories 53S240 53S241A 63S240 63S241A ts1620
Contextual Info: High Performance 5 1 2 x 4 PROM Ti-W PROM Family 5 3 /6 3 S 2 4 0 5 3 /6 3 S 2 4 1 5 3 /6 3 S 2 4 1 A Features/ Benefits Description • 35-ns maximum access time The 53/63S240 and 53/63S241/A are 512x4 bipolar PROMs featuring low input current PNP inputs, full Schottky clamping,

Monolithic Memories ti-w

Abstract: programming TiW PROMs
Contextual Info: IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current and complete.

Monolithic Memories PROM programming

Abstract: 14r21 type KX4 MONOLITHIC MEMORIES PROM A1643 d1641 PMS14R21 Monolithic Memories
Contextual Info: M onolithic G P M S 1 4 R 2 1 /A Programmable Sequencer PROSE Family l M e m o ries Patent Pending / / / ////////////////////////////////////////Æ A D V A N C E INFORMATION Features/ Benefits Description • User-programmable synchronous state machine

53DA841

Abstract: 63DA841
Contextual Info: 2 0 4 8 x 4 Diagnostic Registered PROM 53D A 841 63D A 841 w ith Asynchronous Enable and Output Initialization Features/Benefits Description • Asynchronous output enable • Programmable asynchronous output Initialization • Provides system diagnostic testing with system

Monolithic Memories

Abstract: PLE5P16 PLE6P16 Monolithic Memories PROM programming MONOLITHIC MEMORIES PROM
Contextual Info: KHI Monolithic PLE5P16 PLE6P16 Programmable Logic Element Family REVISED Memories / / / / / ////////////////////////////////////////ADVANCE INFORMATION Features/ Benefits Typical Applications • Programmable replacement lor conventional TTL logic • Address decoding

PM9006

Contextual Info: _ a _ Considerations for In-System Programming BASIC PRINCIPLES AMD Flash memories use 100% TTL-level control In­ puts to manage the command register. Erase and re­ programming operations use a fixed 12.0 V +0.6 V power supply. Read Only Memory Without high Vpp voltage, the Flash memory functions

mmi "tiw PROM" programming

Abstract: MMI PLE5P8 63S481 63S081 22AA PLE9P4 63s281 PLE9R8 PLE10P4 PLE11P8
Contextual Info: Programmable Logic Element RLE Circuit Family Ordering Information Features/Benefits • Programmable replacement for conventional TTL logic PLE5P8 A C N STD • Reduces 1C inventories and simplifies their control • Expedites and simplifies prototyping and board layout

D1641

Abstract: 63D1641 53D1641
Contextual Info: 4 0 9 6 x 4 Diagnostic Registered PROM 53D 1641 63D 1641 Asynchronous Enable Patent Pending Features/Benefits Description • Asynchronous output enable The 53/63D1641 is a 4Kx4 PROM with registered three-state outputs and a shadow register for diagnostic capabilities.

DIP 16 DRAWING Advanced Micro Devices

Abstract: 57401j mmi SINGLE SHIP ORGAN INCOMING RAW MATERIAL INSPECTION checklist Defense 5962-85155 MMI PAL14L8 38510 Cross Reference
Contextual Info: M ilitary S p ecialty M em ory Whatever your military data buffering needs, Advanced Micro Devices has the right specialty memory device to fit your applica­ tion. All of our military bipolar and CMOS First-in First-out FIFO memories are fully screened to MIL-STD-883.

JBP18S030

Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

1024x4

Abstract: 1024X4 prom tS1820 53S441 63S441A 53S440 53S441A 63S440 63S441 generic prom programming
Contextual Info: High Performance 1 0 2 4 x 4 PROM TiW PROM Family 5 3 /6 3 S 4 4 0 5 3 /6 3 S 4 4 1 5 3 /6 3 S 4 4 1 A Features/ Benefits Description • 35-ns maximum access time The 53/63S440 and 53/63S441/A are 1024x4 bipolar PROMs featuring low input current PNP inputs, full Schottky clamping

53S3281

Abstract: 53S3281A 53S3281B 63S3281 63S3281A 4096X8
Contextual Info: High Performance 4 0 9 6 x 8 PROM TiW PROM Family 5 3 /6 3 S 3 2 8 1 5 3 /6 3 S 3 2 8 1 A Features/Benefits Description • 35-ns maximum access time The 53/63S3281 is a high-speed 4Kx8 PROM which uses industry standard pin out. • 32768-blt memory The family features low-current PNP inputs, full Schottky

C193

Contextual Info: TBP28S166 16,384 BITS 2084 WORDS BY 8 BITS STANDARD PROGRAMMABLE READ-ONLY MEMORIES WITH 3-STATE OUTPUTS logic symbol AOA1 A2 A3 A4 A5 A6 A7 A8 A9 A10 G3 G2 pin assignment TBP28S166 (8 ) (7) (6 ) AV (5) AV (3) >A (2) 2047 (1) (23) -Q0 ( 10) “Q1 (11) -Q2

TBP28L22

Contextual Info: TBP28L86A 8192 BITS 1024 WORDS BY 8 BITS LOW-POWER PROGRAMMABLE READ-ONLY MEMORIES WITH 3-STATE OUTPUTS pin assignment logic symbol TBP28L86A TBP28L86A JW OR NW PACKAGE PROM 1024 X 8 AOA 1A 2A 3A4A 5A6A7A8 A9- (7) G2 G1 AV AV AV ( 6) (5) (4) (3) 1023 (2)

tbp24s10

Contextual Info: TBP28LA22 2048 BITS 256 WORDS BY 8 BITS LOW-POWER PROGRAMMABLE READ-ONLY MEMORIES WITH OPEN-COLLECTOR OUTPUTS pin assignment logic symbol TBP28LA22 TBP28LA22 J OR N PACKAGE PROM 256 X 8 AO A1 A2 A3 A4 A5 A6 A7 (TOP VIEW) (1) (2 ) AÙ (3) A£ (4) A£ (5)

TBP28L22

Contextual Info: TBP28L166 16,384 BITS 2084 WORDS BY 8 BITS LOW-POWER PROGRAMMABLE READ-ONLY MEMORIES WITH 3-STATE OUTPUTS pin assignment logic symbol TBP28L166 TBP28L16€ NW PACKAC PROM 2048 X 8 (8 ) AO- (TOP VIEW (7) A1 (5) A3 (4) A4« (3) A 5- 2047 (2 ) A6 ( 22 ) A9