MM74HC 20 PIN Search Results

74xx04

Abstract: 74XX08 74XX00 74xx151 74xx161 TTL 74XX04 CMOS TTL Logic Family Specifications 74xx139 74als power consumption 74XX374
Contextual Info: Fairchild Semiconductor Application Note 319 June 1983 The MM54HC/MM74HC family of high speed logic components provides a combination of speed and power characteristics that is not duplicated by bipolar logic families or any other CMOS family. This CMOS family has operating speeds

M74HCxxxTTR

Abstract: 74ABT FAIRCHILD HEF4000B MM74HC nxp Cross-reference HEF4000 LVT32 SN74HC 74HC HC PORTFOLIO
Contextual Info: General-purpose logic solutions Commitment and innovation 2 Logic solutions Commitment and innovation NXP is deeply committed to the logic market and continually invests in new process and package technologies, and packaging facilities, to ensure that our portfolio remains leadingedge. We offer a very broad variety of innovative

SN74HC logic family

Abstract: SOT505-2 SOT363-6 SOT891 HEF4000 series SOT753 footprint sn74abt fairchild AHC 14 cd4xxx SOT353-1 footprint
Contextual Info: General-purpose logic solutions Commitment and innovation Typical lifecycle of general-purpose logic ABT HC HEF4000 HCT F MB LVT ALS LVC AS CBT LS ALVC LV S ALVT TTL AHC Bipolar CMOS AVC BiCMOS AUP NXP logic products in bold Introduction 2 Logic solutions

ic mm74hc

Abstract: triggering scr with microprocessor cmos scr AN-339 national MM74HC SCR TRIGGER PULSE circuit AN-339 CD4000 MM74C 74HC
Contextual Info: Fairchild Semiconductor Application Note 339 November 1987 INTRODUCTION SCR latch-up is a parasitic phenomena that has existed in circuits fabricated using bulk silicon CMOS technologies. The latch-up mechanism, once triggered, turns on a parasitic SCR internal to CMOS circuits which essentially shorts VCC

Contextual Info: January 1988 Semiconductor MM54HC266A/MM74HC266A Quad 2-Input Exclusive NOR Gate Open Drain General Description Features This exclusive NOR gate utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to equivalent LS-TTL gates while maintaining the low power

Contextual Info: January 1988 Semiconductor MM54HC7266/MM74HC7266 Quad 2-Input Exclusive NOR Gate General Description Features This exclusive NOR gate utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to equivalent LS-TTL gates while maintaining the low power

MM74HC

Abstract: MM54HC FAJ 40 AAMI 74HC MM54HC4016 MM74HC4016 125t 2C11 150TC
Contextual Info: MM54HC4016, MM74HC4016 9 7 -y F SP S T sp st cm os T i- n t ? CMOS i g i Q T t D j c •7.4 ~ j< ?X. 12VPeal <07 V f-itw.jim&x-zrtizrïimü.cfflm'zft, T1-Í “L ” <D¿ ÿ ^-7-ÿtM£ & ? > . ‘ f-<D 7-i~a ± O rvî -f v ^ ^ A i J S í t i í r E í R t c ^ L S i S t i t i ' i .

MM74HC 20 pin

Abstract: mm74hc MC74HC597N
Contextual Info: Revised May 1999 MM74HC597 8-Bit Shift Registers with Input Latches General Description This high speed register utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption of standard CMOS integrated circuits,

Mc74hc221an

Abstract: 16LEAD SPICE MODELS 74hc mc74hc221a 74hc221A
Contextual Info: Revised February 1999 MM74HC221A Dual Non-Retriggerable Monostable Multivibrator General Description The MM74HC221A high speed monostable multivibrators one shots utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high

Contextual Info: MM54HC132/MM74HC132 PRELIMINARY National Semiconductor MM54HC132/MM74HC132 Quad 2-Input NAND Schmitt Trigger General Description Features The MM54HC132/MM74HC132 utilizes advanced silicongate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the

MC74HC163N

Abstract: 74HC163
Contextual Info: Revised February 1999 MM74HC161 • MM74HC163 Synchronous Binary Counter with Asynchronous Clear • Synchronous Binary Counter with Synchronous Clear General Description The MM74HC161 and MM74HC163 synchronous presettable counters utilize advanced silicon-gate CMOS technology and internal look-ahead carry logic for use in high

CD4049BM

Abstract: cd4049b MM74HC 0-15V 74HC CD4049BC MM54HC4050 MM74HC4050
Contextual Info: MM54HC4049/MM74HC4049 Hex Inverting Logic Level Down Converter MM54HC4050/MM74HC4050 Hex Logic Level Down Converter General Description The MM54HC4049/MM74HC4049 and the MM54HC4050/ MM74HC4050 utilize microCMOS Technology, 3.5 micron silicon gate P-well CMOS, and have a modified input protec­

MM74HC58

Abstract: 74HC MM54HC51 MM54HC58 MM74HC51 MM54HC51J
Contextual Info: MM74HC51 • MM74HC58 Dual AND-OR-Invert Gate • Dual AND-OR Gate General Description Features These gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have buffered outputs, providing high noise

54HC

Abstract: 74HC MM54HC MM54HC86 MM74HC MM74HC86 MM74HC86J
Contextual Info: MM74HC86 Quad 2-Input Exclusive OR Gate General Description Features This EXCLUSIVE OR gate utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to equivalent LS-TTL gates while maintaining the low power consumption and high noise immunity characteristic of standard CMOS integrated circuits. These gates are fully buffered and have a fanout of 10 LS-TTL loads. The MM54HC/

Contextual Info: January 1988 MM54HC237/MM74HC237 3-to-8 Line Decoder With Address Latches General Description The 54HC/74HC logic family is speed, function and pin-out compatible with the standard 54LS/74LS logic family. All inputs are protected from damage due to static discharge by

Contextual Info: MM54HC174/MM74HC174 Hex D Flip-Flops with Clear General Description Features These edge triggered flip-flops utilize advanced silicon-gate CMOS technology to Implement D-type flip-flops. They pos­ sess high noise Immunity, low power, and speeds compara­

Contextual Info: January 1988 Semiconductor MM54HC30/MM74HC30 8-Input NAND Gate General Description Features This NAND gate utilizes advanced silicon-gate CMOS tech­ nology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS inte­

MM74HC132N

Abstract: 74HC M14A MM74HC132 MM74HC132M MM74HC132MTC MTC14 N14A
Contextual Info: MM74HC132 Quad 2-Input NAND Schmitt Trigger General Description Features The MM74HC132 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads.

FAIRCHILD MM74HC

Abstract: 74HC MM54HC MM54HC174 MM74HC MM74HC174
Contextual Info: MM74HC174 Hex D Flip-Flops with Clear General Description These edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flip-flops. They possess high noise immunity, low power, and speeds comparable to low power Schottky TTL circuits. This device contains 6 master-slave flip-flops with a common clock and

Contextual Info: January 1988 Semiconductor MM54HC05/MM74HC05 Hex Inverter Open Drain General Description Features The MM54HC05/MM74HC05 are logic functions fabricated by using advanced silicon-gate CMOS technology, which provides the inherent benefits of CMOS— low quiescent

FAIRCHILD MM74HC

Abstract: M16A MM54HC MM74HC MM74HC148 MM74HC148M MM74HC148N MS-001 N16E
Contextual Info: Revised September 2001 MM74HC148 8-3 Line Priority Encoder General Description Features The MM74HC148 priority encoder utilizes advanced silicon-gate CMOS technology. It has the high noise immunity and low power consumption typical of CMOS circuits, as well as the speeds and output drive similar to LB-TTL.

Contextual Info: January 1988 Semiconductor MM54HC20/MM74HC20 Dual 4-Input NAND Gate General Description Features These NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS

Contextual Info: National January 1988 Semiconductor MM54HC03/MM74HC03 Quad 2-Input Open Drain NAND Gate General Description Features These NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS

Contextual Info: January 1988 MM54HC133/MM74HC133 13-Input NAND Gate General Description Features This NAND gate utilizes advanced silicon-gate CMOS tech­ nology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS inte­ grated circuits. All gates have buffered outputs. All devices