MK50H25 Search Results

80386SX

Abstract: DIP48 MK5025 MK5027 MK50H25 Z8000 dali Receiver 80286 instruction
Contextual Info: MK50H25 HIGH SPEED LINK LEVEL CONTROLLER SECTION 1 - FEATURES System clock rate up to 33 MHz MK50H25 33 , 25 MHz (MK50H25 - 25), or 16 MHz (MK50H25 - 16). Data rate up to 20 Mbps continuous (MK50H25 - 33) or up to 51 Mbps bursted On chip DMA control with programmable burst

Contextual Info: MK50H25 HIGH SPEED X.25 LINK LEVEL CONTROLLER PRODUCT PREVIEW • Fully com patible with both 8 or 16 bit systems. ■ System clock rate up to 33 MHz. ■ Data rate up to 20 Mbps continuous or up to 50 Mbps bursted ■ Separate 64-byte Transm it and Receive FIFO.

MK5025

Abstract: MK5025Q MK50H25 MK50H25Q MK50H25Q16 MK50H27
Contextual Info: APPLICATION NOTE Upgrading From MK5025 to MK50H25 by Darin Kincaid The MK50H25 is a pin for pin replacement for the MK5025 with additional features and performance enhancements. Options such as on-chip watch dog timers and pass through of bad CRCs are available

DIP48

Abstract: DIP-48 MK5025 MK5027N MK5027Q MK50H25N MK50H25Q MK50H27 MK50H27Q MK50H28N
Contextual Info: TELECOM AND DATA COMMUNICATIONS DATACOM PACKET SWITCHING/CCS#7 Type MK5025 MK50H25Q MK50H25N MK5027Q MK5027N MK50H27 MK50H27Q MK50H28Q MK50H28N MK5029 Description Package X 25 LAPB/ISDN LAPD/HDLC CMOS Hi-Speed Link Level Controller with DMA X 25 Link Level Controller

uav design specification

Abstract: water filling station circuit diagram DALI CONTROL logical block diagram of 80286 uav electronic design water level controller using timer 555 8086 microprocessor pin description control data bus for 80286 uav design z80 cio
Contextual Info: MK50H25 HIGH SPEED LINK LEVEL CONTROLLER ADVANCE DATA SECTION 1 - FEATURES System clock rate up to 33 MHz MK50H25 33 , 25 MHz (MK50H25 - 25), or 16 MHz (MK50H25 - 16). Data rate up to 20 Mbps continuous (MK50H25 - 33) or up to 51 Mbps bursted On chip DMA control with programmable burst

MK5021Q10

Abstract: MK5025 MK5025Q MK50H25 MK50H25Q MK50H25Q16 MK50H27 mk5021 mk5021q-10
Contextual Info: APPLICATION NOTE Upgrading From MK5025 to MK50H25 by Darin Kincaid The MK50H25 is a pin for pin replacement for the MK5025 with additional features and performance enhancements. Options such as on-chip watch dog timers and pass through of bad CRCs are available

SRS 4451

Contextual Info: / = T S G S -T H O M S O N MK50H25 HIGHSPEED LINK LEVEL CONTROLLER ADVANCE DATA SECTION 1 - FEATURES • System clock rate up to 33 MHz MK50H25 33 , 25 MHz (MK50H25 - 25), or 16 MHz (MK50H25- 16). ■ Data rate up to 20 Mbps continuous (MK50H25 - 33) or up to 51 Mbps bursted

Contextual Info: SGS-THOMSON MK50H25 HIGH SPEED X.25 LINK LEVEL CONTROLLER PRODUCT PREVIEW Fully compatible with both 8 or 16 bit systems. System clock rate up to 33 MHz. Data rate up to 20 Mbps continuous or up to 50 Mbps bursted Separate 64-byte Transmit and Receive FIFO.

MK5025

Abstract: MK5025Q MK50H25 MK50H25Q MK50H25Q16 MK50H27
Contextual Info: APPLICATION NOTE Upgrading From MK5025 to MK50H25 by Darin Kincaid The MK50H25 is a pin for pin replacement for the MK5025 with additional features and performance enhancements. Options such as on-chip watch dog timers and pass through of bad CRCs are available

Contextual Info: r= 7 * • 1 /, S G S 'T H O M S O N MK50H25 M is œ U E ig T M O e i HIGHSPEED LINK LEVEL CONTROLLER AD VA N C E DATA SECTION 1 - FEATURES • System clock rate up to 33 MHz MK50H25 33 , 25 MHz (MK50H25 - 25), or 16 MHz (MK50H25 - 16). ■ Data rate up to 20 Mbps continuous

mk5021

Abstract: DIP-48 DIP48
Contextual Info: TELECOM AND DATA COMMUNICATIONS DATACOM PACKET SWITCHING/CCS#7 Type MK5025 MK50H25Q MK50H25N MK5027Q MK5027N MK50H28Q MK50H28N MK5029 Description Package X 25 LAPB/ISDN LAPD/HDLC CMOS Hi-Speed Link Level Controller with DMA X 25 Link Level Controller X 25 Link Level Controller

80386SX

Abstract: DIP48 MK5025 MK5027 MK50H25 Z8000 dali power supply circuit diagram dali master many
Contextual Info: MK50H25 HIGH SPEED LINK LEVEL CONTROLLER SECTION 1 - FEATURES System clock rate up to 33 MHz MK50H25 33 , 25 MHz (MK50H25 - 25), or 16 MHz (MK50H25 - 16). Data rate up to 20 Mbps continuous (MK50H25 - 33) or up to 51 Mbps bursted On chip DMA control with programmable burst

dali

Abstract: DALI CONTROL DAL12
Contextual Info: MK50H25 HIGH SPEED LINK LEVEL CONTROLLER ADVANCE DATA SECTION 1 - FEATURES System clock rate up to 33 MHz MK50H25 33 , 25 MHz (MK50H25 - 25), or 16 MHz (MK50H25 - 16). Data rate up to 20 Mbps continuous (MK50H25 - 33) or up to 51 Mbps bursted On chip DMA control with programmable burst

DALI rc BASIC SO

Contextual Info: SGS-THOMSON MK50H25 HIGHSPEED LINK LEVEL CONTROLLER ADVANCE DATA SECTION 1 - FEATURES • System clock rate up to 33 MHz MK50H25 33 , 25 MHz (MK50H25 - 25), or 16 MHz (MK50H25 - 16). ■ Data rate up to 20 Mbps continuous (MK50H25 - 33) or up to 51 Mbps bursted

MK50H27

Abstract: MK5025 MK5025Q MK50H25 MK50H25Q MK50H25Q16
Contextual Info: APPLICATION NOTE Upgrading From MK5025 to MK50H25 by Darin Kincaid The MK50H25 is a pin for pin replacement for the MK5025 with additional features and performance enhancements. Options such as on-chip watch dog timers and pass through of bad CRCs are available

Contextual Info: SGS-TtiOMSON MK50H28 • U K ê T IM M Ê i MULTI LOGICAL LINK FRAME RELAY CONTROLLER SECTION 1 - FEATURES ■ Based on ITU Q.933 Annex A and T1.617 An­ nex D Standards for Frame Relay Service and Additional Pocedures for Permanent Virtual Circuits PVCs .

mk5021

Abstract: N393 BCNT DIP48 MK5027 MK50H28 PLCC52 Z8000 A 1905 LMI
Contextual Info: MK50H28 MULTI LOGICAL LINK FRAME RELAY CONTROLLER SECTION 1 - FEATURES Based on ITU Q.933 Annex A and T1.617 Annex D Standards for Frame Relay Service and Additional Pocedures for Permanent Virtual Circuits PVCs . Optional Transparent Mode (no LMI Protocol

TDA0161 equivalent

Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
Contextual Info: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:

PQFP44

Abstract: STLC5432 STLC5432Q PQFP4410X10 8192KB
Contextual Info: / = T S G S -TH O M S O N ^ 7 # . [* ^ Â g T ÏÏ!M STLC5432 []© S 2Mbit CEPT & PRIMARY RATE CONTROLLER DEVICE PRODUCT PREVIEW ONE CHIP SOLUTION FROM PCM BUS TO TRANSFORMER(CEPT STANDARD ISDN PRIMARY ACCESS CONTROLLER (COMPATIBLE WITH ETSI, OPTION 1 AND 2)

N393

Abstract: DIP48 MK50H25 MK50H27 MK50H28 PLCC52 Z8000 DAL13
Contextual Info: MK50H28 MULTI LOGICAL LINK FRAME RELAY CONTROLLER SECTION 1 - FEATURES Based on ITU Q.933 Annex A and T1.617 Annex D Standards for Frame Relay Service and Additional Pocedures for Permanent Virtual Circuits PVCs . Optional Transparent Mode (no LMI Protocol

JT-Q703

Abstract: MK50H27Q-33 bsnt1
Contextual Info: MK50H27 Signalling System 7 Link Controller SECTION 1 - FEATURES Complete Level 2 Implementation of SS7. Compatible with 1988 CCITT, AT&T, ANSI, and Bellcore Signalling System Number 7 link level protocols. Optional operation to comply with Japanese TTC JT-Q703 specification requirements

Q703

Abstract: DIP48 MK50H25 MK50H27 MK50H28 Z8000 JT-Q703 68000 thomson
Contextual Info: MK50H27 Signalling System 7 Link Controller SECTION 1 - FEATURES Complete Level 2 Implementation of SS7. Compatible with 1988 CCITT, AT&T, ANSI, and Bellcore Signalling System Number 7 link level protocols. Optional operation to comply with Japanese TTC JT-Q703 specification requirements

AN489

Abstract: mk5021 an-490 AN-489 mk5021 technical manual
Contextual Info: ALPHANUMERICAL INDEX ISDN Type Number Function Page GS1T70-D540 ISDN DC-DC Converter 275 ST5080 Piafe Programmable ISDN Audio Front End 245 ST5410 2B1QU Interface Device 27 ST5410 User Manual 81 ST5420 Sid-^W : S/T Interface Device with Microwire/DSI 153 ST5421

STR d 4412 PINS DETAILS

Abstract: dali n39l
Contextual Info: SGS-THOMSON iH lM M O e s M K 5 0 H 2 8 MULTI LOGICAL LINK FRAME RELAY CONTROLLER SECTION 1 - FEATURES • Based on ITU Q.933 Annex A and T1.617 An­ nex D Standards for Frame Relay Service and Additional Pocedures tor Permanent Virtual Circuits PVCs . ■ Optional Transparent Mode (no LMI Protocol