MC100LVE Search Results

KVT23

Abstract: MC100LVELT23 MC100LVELT23D MC100LVELT23DR2 MC100LVELT23DT
Contextual Info: MC100LVELT23 3.3V Dual Differential LVPECL to LVTTL Translator The MC100LVELT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the LVELT23 makes it ideal for applications which

MC100LVEL01

Abstract: MC100LVEL01D 1085 SPICE model
Contextual Info: MC100LVEL01 3.3VĄECL 4-Input OR/NOR The MC100LVEL01 is a 4–input OR/NOR gate. The device is functionally equivalent to the EL01 device and works from a 3.3 V supply. With AC performance similar to the EL01 device, the LVEL01 is ideal for low voltage applications which require the ultimate in

KVL11

Abstract: KV11 LVEL11 MC100LVEL11
Contextual Info: MC100LVEL11 3.3V ECL 1:2 Differential Fanout Buffer Description The MC100LVEL11 is a differential 1:2 fanout buffer. The device is functionally similar to the E111 device but with higher performance capabilities. Having within-device skews and output transition times

KV05

Abstract: KVL05 MC100EL05 MC100LVEL05 MC100LVEL05MNR4G
Contextual Info: MC100LVEL05 3.3V ECL 2-Input Differential AND/NAND Description The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3 V supply voltage. With propagation delays and output transition times equivalent to the EL05, the LVEL05 is ideally

LVEP210

Abstract: MC100 MC100EP210 MC100LVEP210
Contextual Info: MC100LVEP210 2.5V / 3.3V 1:5 Dual Differential ECL/PECL/HSTL Clock Driver Description The MC100LVEP210 is a low skew 1−to−5 dual differential driver, designed with clock distribution in mind. The ECL/PECL input signals can be either differential or single−ended if the VBB output is

KVL51

Abstract: MC100LVEL51 transistor marking PB
Contextual Info: MC100LVEL51 3.3V ECL Differential Clock D Flip-Flop Description The MC100LVEL51 is a differential clock D flip-flop with reset. The device is functionally equivalent to the EL51 device, but operates from a 3.3 V supply. With propagation delays and output transition times

EL12

Abstract: MC100LVEL12 MC100LVEL12D
Contextual Info: MC100LVEL12 3.3VĄECL Low Impedance Driver The MC100LVEL12 is a low impedance drive buffer. With two pairs of OR/NOR outputs the device is ideally suited for high drive applications such as memory addressing. The device is functionally equivalent to the EL12 device and operates from a 3.3 V power supply.

DL140

Abstract: E210 LVE111 MC100E210 MC100LVE210
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Voltage Dual 1:4, 1:5 Differential Fanout Buffer MC100LVE210 MC100E210 ECL/PECL Compatible The MC100LVE210 is a low voltage, low skew dual differential ECL fanout buffer designed with clock distribution in mind. The device features

DL140

Abstract: MC100EL05 MC100LVEL05 LVEL05
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 2ĆInput Differential AND/NAND MC100LVEL05 The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3V supply voltage. With propagation delays and output transition

DL140

Abstract: MC100LVEL37
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview 1:4 ÷1/÷2 MC100LVEL37 ECL/PECL Clock Fanout Buffer The MC100LVEL37 is a fully differential 1:4 fanout buffer. The device offers two outputs at ÷1 of the input frequrency, and two outputs at ÷2 of the input frequency. The Low Output–Output Skew of the device makes it

KVL33

Abstract: EL33 MC100LVEL33 MC100LVEL33D
Contextual Info: MC100LVEL33 3.3VĄECL ÷4 Divider The MC100LVEL33 is an integrated ÷4 divider. The LVEL is functionally equivalent to the EL33 and works from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the

751D-04

Abstract: DL140 MC100EL59 MC100LVEL59 DM 1265
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple 2:1 Multiplexer MC100LVEL59 MC100EL59 The MC100LVEL59 is a triple 2:1 multiplexer with differential outputs. The MC100EL59 is pin and functionally equivalent to the MC100LVEL59 but is specified for operation at the standard 100E ECL voltage supply.

LVELT23

Abstract: DL140 MC100LVELT23
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview Dual Differential LVPECL to MC100LVELT23 TTL Translator The MC100LVELT23 is a dual differential LVPECL to TTL translator. Because LVPECL Positive ECL levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the dual gate

LVE222

Abstract: MC100LVE222 MC100LVE222FA MC100LVE222FAR2 MB113
Contextual Info: MC100LVE222 3.3 V ECL 1:15 Differential ÷1/÷2 Clock Driver The MC100LVE222 is a low skew 1:15 differential ÷1/÷2 ECL fanout buffer designed with clock distribution in mind. The LVECL/LVPECL input signal pairs can be differential or used single- ended with VBB output reference bypassed and connected to the

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA P roduct Preview MC100LVEL32 ^-2 Divider The MC100LVEL32 is an integrated +2 divider. The differential clock inputs and the V b b allow a differential, single-ended or AC coupled interface to the device. If used, the V b b output should be bypassed to

Contextual Info: M O TO RO LA SEMICONDUCTOR TECHNICAL DATA Low Voltage 1:2 Differential Fanout Buffer The MC100LVEL11 is a differential 1:2 fanout buffer. The device is functionally similar to the E111 device but with higher performance capabilities. Having within-device skews and output transition times

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA P roduct Preview Differential Clock D Flip-Flop The MC100LVEL51 is a differential clock D flip-flop with reset. The device is functionally equivalent to the EL51 device, but operates from a low voltage supply. With propagation delays and output transition times

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple D Flip-Flop With Set and Reset MC100LVEL30 M C100EL30 The MC100LVEL30 is a triple master-slave D flip flop with differential outputs. The MC100EL30 is pin and functionally equivalent to the MC100LVEL30 but is specified for operation at the standard 100E ECL

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple 2:1 M ultiplexer MC100LVEL59 MC100EL59 The MC100LVEL59 is a triple 2:1 multiplexer with differential outputs. The MC100EL59 is pin and functionally equivalent to the MC100LVEL59 but is specified for operation at the standard 100E ECL voltage supply. The

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA P roduct Preview Low Voltage 1:15 Differential ECL/PECL Clock Driver The MC100LVE222 is a low voltage, low skew 1:15 differential ECL fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system skew.

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA P roduct Preview MC100LVEL32 2 Divider The MC100LVEL32 is an integrated +2 divider. The differential clock inputs and the V bb allow a differential, single-ended or AC coupled interface to the device. If used, the V bb output should be bypassed to

Contextual Info: M O T O R O L A motorol a sc <l o g i c SEMICONDUCTOR bñE D b3 b7 ES2 0 0 ^ 5 2 5 5 T4 T • TECHNICAL DATA Advance Information Low -Voltage 1:9 D ifferential ECL/PECL C lock Driver The MC100LVE111 is a low skew 1-to-9 differential driver, designed with

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low V oltage Dual 1:4, 1:5 D ifferential Fanout Buffer M C100LVE210 M C 100E210 ECL/PECL Compatible The MC100LVE210 is a low voltage, low skew dual differential ECL fanout buffer designed with clock distribution in mind. The device features

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information MC100LVEL56 M C100EL56 Dual Differential 2:1 M ultiplexer The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The MC100EL56 is pin and functionally equivalent to the MC100LVEL56 but is specified for operation at the standard 100E ECL voltage supply. The