LSI CELL LIBRARY Search Results

LSI CELL LIBRARY Result Highlights (5)

Part	Manufacturer	Description
DRV2605YZFR	Texas Instruments	Haptic Driver for ERM/LRA with Built-In Library and Smart Loop Architecture 9-DSBGA -40 to 85
DRV2605YZFT	Texas Instruments	Haptic Driver for ERM/LRA with Built-In Library and Smart Loop Architecture 9-DSBGA -40 to 85
DRV2625YFFR	Texas Instruments	Advanced ERM & LRA Haptics Driver with Smart Loop and Embedded Effects Library 9-DSBGA -40 to 85
DRV2625YFFT	Texas Instruments	Advanced ERM & LRA Haptics Driver with Smart Loop and Embedded Effects Library 9-DSBGA -40 to 85
DRV2605LDGST	Texas Instruments	Haptic Driver for ERM and LRA with Built-In Library and Smart Loop Architecture 10-VSSOP -40 to 85

LSI CELL LIBRARY Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
headland 386 Abstract: transistor zo 607 MA 7S b2211 full subtractor using ic 74138 Contextual Info: LOGIC LCB300K Cell-Based 5 Volt ASIC Products Databook October 1994 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.	OCR Scan	lcb300k db04-000049-00 d-102 i40lg +4headland 386 transistor zo 607 ma 7s b2211 full subtractor using ic 74138	PDF
G12-l Abstract: LSI Logic ASIC g12 High Voltage G12L g12 transistor G12 000 Contextual Info: G12 ASIC Cell-Based Product Features/ Benefits Twelfth Generation ASIC Technology • ASIC technology with 0.18 micron L-drawn Overview LSI Logic’s G12 ASIC Cell-Based product, with its three digital libraries, offers unprecedented options for system ASIC designers to optimize their ASIC or	Original	18-micron 13-micron b20023 g12-l +4lsi logic asic g12 high voltage g12l g12 transistor g12 000	PDF
LC97000 Abstract: LC9600 97000Series sanyo lc9600 DIP18 LC90 DIP52 LC92000 Contextual Info: SAN YO S E M I C O N D U C T O R CO RP 22E D • 7^707^ QOQbbTñ 1 ■ LC9600Series, 97000Series CM OS LSI Standard Cell 2722A O verview The LC9600, 97000 Series CMOS Standard Cells offer the flexibility and simplicity of semi-custom design using standard cells, together with the convenience of function cell and I/O cell compatibility	OCR Scan	lc9600series 97000series 2722a lc9600 +9lc9100 lc92000 lc97000 dip64s qip48a sanyo lc9600 dip18 lc90 dip52	PDF
ARM1156T2-S Abstract: AMBA AXI to APB BUS Bridge AMBA AXI to APB BUS Bridge architecture PL022 AXI-64 interface ARM processor data flow PL300 AMBA AHB to AXI AMBA AHB bus protocol ARM1156T2S Contextual Info: ARM1156T2-S TCM-only Processor with ECC Protection and Reference Design CW001145 FEATURES • 450 MHz timing-closed hardmac OVERVIEW The LSI Logic implementation of the ARM1156T2-S processor for cell-based ASIC provides an integration friendly solution for applications like mass storage	Original	arm1156t2-s cw001145 arm966e-s c20069 +9amba axi to apb bus bridge amba axi to apb bus bridge architecture pl022 axi-64 interface arm processor data flow pl300 amba ahb to axi amba ahb bus protocol arm1156t2s	PDF
ddr phy Abstract: rapidchip LSI coreware library DDR PHY ASIC CW108005 L79301 OC192 LSI Rapidchip Gigablaze serdes CMOS LSI gigablaze serdes Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while	Original	l79301 80-bit ddr phy rapidchip +7lsi coreware library ddr phy asic cw108005 oc192 lsi rapidchip gigablaze serdes cmos lsi gigablaze serdes	PDF
L69301 Abstract: L6930 LSI Rapidchip g12 transistor Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while	Original	l79301 80-bit db08-000215-00 l69301 +3l6930 lsi rapidchip g12 transistor	PDF
schottky diode sb 5400 Abstract: 0741L UL1560 IMX86 imx26 ILX02 TJ 1H 74LSXX IC 074CM RHX11 Contextual Info: napc/ signetics labSBIEH 0021720 1 « S I C 3 SHC D “ 8 2 5 0 0 O 'ò ^ S T G 'N jH T T C 5” C Ü R P 5 4C "'2L 720 BIPOLAR LSI PRODUCTS COMPOSITE CELL LOGIC CCL SEMI-CUSTOM FAMILY = r~ _ T-42-11-05 The packing density of an IS L cell (Figure 3) is two to three times	OCR Scan	schottky diode sb 5400 0741l ul1560 imx86 +6imx26 ilx02 tj 1h 74lsxx ic 074cm rhx11	PDF
CMOS Logic Family Specifications Abstract: LSI CMOS GATE ARRAY CB-C9 macro CMOS-N5 Family CMOS8 ic master guide cmos series NEC V30MX CMOS-N5 Gate Array ICs Contextual Info: Semi-custom IC , NEC s ASIC Product Line-Up 0.25 m m ASIC What Is ASICs ? Selecting an LSI Gate Array Road Map Criteria for Selection Cell-Based IC Road Map Criteria for Selection Embedded Array Development Period and Relative Performance Development Investment and Element Cost	Original	x13769xj2v0cd00 ea-c10 cb-c10 cmos logic family specifications +8lsi cmos gate array cb-c9 macro cmos-n5 family cmos8 ic master guide cmos series nec v30mx cmos-n5 gate array ics	PDF
LSI CMOS GATE ARRAY Abstract: LEA100066 LEA100K LSI LOGIC LEA100K rs flip-flop IC 7400 24008a Contextual Info: LSI LOGIC LEA100K Embedded Array Series Description The LEA100K Embedded Array Series is an HCMOS ASIC Application-Specific Integrated Circuit product which combines the integra tion and performance benefits of Cell-Based ASICs with the fast turnaround time of ArrayBased ASICs. The LEA100K series is manufac	OCR Scan	lea100k lsi cmos gate array lea100066 lsi logic lea100k +2rs flip-flop ic 7400 24008a	PDF
LCA200K Abstract: re 497.1 82385 sim 300 v 703 LCB007 Contextual Info: LSI LOGIC NOV 19 1992 LEA200K Embedded Array Series Description The LEA200K Embedded Array Series is a submicron HCMOS ASIC product w hich com bines the integration and performance bene fits of Cell-Based ASICs w ith the fast turnaround time of Array-Based ASICs. The	OCR Scan	lea200k 55-micron lca200k re 497.1 +382385 sim 300 v 703 lcb007	PDF
lvds to eDP Abstract: qpsk implementation using verilog EDA 2500 manual LSI gigablaze "ASIC Products Databook" vhdl code hamming oak dsp EDP LVDS BZ75 LSI Logic EPBGA Contextual Info: G10 -p Deep Submicron ASIC Technology Datasheet The G10-p cell-based CMOS ASIC technology is the highest performance, highest density 3.3 V product in LSI Logic’s portfolio, and supports consumer, computer, and communications applications. The G10-p ASIC product combined with specialized cores enable optimized	Original	g10tm-p g10-p 35-micron lvds to edp +9qpsk implementation using verilog eda 2500 manual lsi gigablaze asic products databook vhdl code hamming oak dsp edp lvds bz75 lsi logic epbga	PDF
LCA200K Abstract: 130 nm CMOS standard cell library 10-JK LEA100K CLDCC LEA200K Contextual Info: 5304Û04 ÜD m STl 3bb • LLC LSI LOGIC LEA200K Embedded Array Series Description The LEA200K Embedded Array Series is a submicron HCMOS ASIC product which com bines the integration and performance bene fits of Cell-Based ASICs with the fast turnaround time of Array-Based ASICs. The	OCR Scan	lea200k 55-micron lca200k 130 nm cmos standard cell library +310-jk lea100k cldcc	PDF
4x4 barrel shifter with flipflop Abstract: LEA100K LCA100K ta 8259 LEA100006 LEA100008 LSI LOGIC LEA100K 82385 B282 24008A Contextual Info: LSI LOGIC LEA100K Embedded Array Series Description The LEA100K Embedded A rray Series is an HCMOS ASIC A pplication-S pecific Integrated Circuit product w hich combines the integra tion and perform ance benefits of Cell-Based ASICs w ith the fa st turnaround tim e of A rrayBased ASICs. The LEA100K series is m anufac	OCR Scan	lea100k 4x4 barrel shifter with flipflop lca100k ta 8259 +6lea100006 lea100008 lsi logic lea100k 82385 b282 24008a	PDF
d217e Abstract: IMX26 7400 signetics input xor IMX86 74LSXX IC ic configuration of xnor gates internal gates of IC 7400 IMX02 7400 signetics 74LS 2 input xnor gate Contextual Info: NAPC/ SI G NE TI C S S MC D • bb SBT EH 00 217 20 1 «SIC3 5<+C 217 20 “8 2 5 0 O Ô ' ô ^ S T G ' N j e r r C S ^ ' C Û R P BIPOLAR LSI PR O DU C TS COMPOSITE CELL LOGIC CCL SEMI-CUSTOM FAMILY w ~ T -4 2 -1 1 -0 5 D E S IG N F E A T U R E S The p a ck in g d en sity of an I S L cell (Figure 3) is two to three tim es	OCR Scan	bhs3ei24 qge172q t-42-11-05 80-mllliampere +11-554c d217e imx26 7400 signetics input xor imx86 74lsxx ic ic configuration of xnor gates internal gates of ic 7400 imx02 7400 signetics 74ls 2 input xnor gate	PDF

LSI Logic Abstract: primetime si user guide 74426 LSI logic array components lsi ndl Contextual Info: Lr Lecture 1 Chip Planning Tools Flow and Licensing 06-00 1.1 1 We Will Discuss… • • • • • • Avant! Tools Overview High Level Planet -PL Flow Detailed Chip Planning Tools Flow Design Methodology Flow Licensing Issues lsidesmgr & Design Setup	Original	g10/g11/g12 lsi logic primetime si user guide 74426 +2lsi logic array components lsi ndl	PDF
horizontals output transistor c 6093 Abstract: S1L50552 S1L50000 mod 8 ring counter using JK flip flop i.c t244 working of tsop 1738 application and features of TSOP 1738 level shifter from TTL to CMOS LIN VHDL source code Model 103 Power Supply Contextual Info: MF1244-03a GATE ARRAY S1L50000 Series 2.5 Voltage Library DESIGN GUIDE S1L50000 Series 2.5 Voltage Library DESIGN GUIDE First issue April,1998 D Printed June, 2002 in Japan C A NOTICE No part of this material may be reproduced or duplicated in any from or by any means without the	Original	mf1244-03a s1l50000 horizontals output transistor c 6093 s1l50552 +7mod 8 ring counter using jk flip flop i.c t244 working of tsop 1738 application and features of tsop 1738 level shifter from ttl to cmos lin vhdl source code model 103 power supply	PDF
standard cell library Abstract: jtag samsung Contextual Info: STDH90/MDL90 0.35µm 3.3V/5V CMOS Standard Cell Library for Pure Logic/MDL Products STDH90/MDL90 0.35µm 3.3V/5V CMOS Standard Cell Library for Pure Logic/MDL Products Data Book  1998 Samsung Electronics Co., Ltd. All rights reserved. No part of this document may be reproduced, in any form or by any means, without the prior	Original	stdh90/mdl90 std90/mdl90 standard cell library jtag samsung	PDF
LSI LOGIC Abstract: 700UM Contextual Info: Chip Planning w/ Avant! Planet -PL Workbook G11 Copyright LSI Logic Corporation 1999, 2000 All Rights Reserved. Chip Planning w/ Avant! Planet -PL Software Training Workbook (G11) Produced by the Customer Education Group May 2000 Copyright LSI Logic Corporation 1999, 2000. All rights reserved.	Original	lsi logic 700um	PDF
lsi logic arrays Contextual Info: L S I L OGI C CORP Û1 dF I 5304Ö0M □ □□□ ÖS 3 7 LSI LSI Logic Corporation 1551 McCarthy Blvd Milpitas, CA 95035 408.433.8000 Telex 172153 The LDS Design System 5304804 General Description ir L S I LOGIC CORP •5T The LDS Design System is a front-end ASIC design	OCR Scan	lsi logic arrays	PDF
1034-01 Abstract: 74 series family LP5080A LP5140A LP7080C LP7080P LP7140P LP7220P Laserpath Corporation lsi logic arrays Contextual Info: LSP LASERPATH LP7000P, LP7000C, LP5000A Series Gate Arrays ONE DAY GATE ARRAYS A p ril 1987 Laserpath’s LP7000P, LP7000C, and LP5000A Series are high I/O gate arrays, manufac tured using 2-micron, 2-layer metal HCMOS technology. They have the same electrical	OCR Scan	lp7000p lp7000c lp5000a lp7080p +10lp7080c lp5080a lp5600a 1034-01 74 series family lp5140a lp7140p lp7220p laserpath corporation lsi logic arrays	PDF
S3P4 Abstract: LSI Logic Contextual Info: L S I LOGIC CORP 54 D e \| S3P4Ô04 OQODOOl □ \| 0 . T_42_05 LSI LOGIC CORPORATION SOFTWARE DATA BOOK LL5000 SERIES Functional Macrocell Library LL5000 Series M acrocell L ib rary fo r M e n to r Graphics ID E A 1000™— Daisy LOGICIAN™ — V a lid Logic SCALDsystem™ E ng ineerin g W orkstations	OCR Scan	ll5000 1000tm--tnlm-172 013/384/5k/i/j +2s3p4 lsi logic	PDF
AOI31 Abstract: RSC-15 74LS94 EK-044-9004 ic 74ls83 CSR b4c M240C 4520C M165C bf368 Contextual Info: n n EK-044-9004 CMOS Gate Array 5GV Series The RICOH gate array 5GV series complies with the CMOS 1.5/i rule, and offers high speed operation with a gate delay time of 1.0 ns. The 5GV series inherits the rich library of 5GF gate array series. The cell library is compatible with	OCR Scan	ek-044-9004 rsc-15 74ls165 74ls197 +14ls240 m390c m393c m540c 40i7c 4028c aoi31 74ls94 ic 74ls83 csr b4c m240c 4520c m165c bf368	PDF
KC80 kawasaki Abstract: LSI CMOS Technology z80 vhdl KC80 PGA pin count lsi 176 Contextual Info: HIGH-DENSITY KZ300GH KZ300EH CMOS GATE ARRAYS OVERVIEW With the KZ300GH/KZ300EH CMOS Series, Kawasaki LSI offers an advanced, 0.5micron generation of gate arrays and embedded arrays. These leading-edge devices provide optimal solutions to meet your cost and performance needs for low-voltage, high-speed	Original	kz300gh kz300eh kz300gh/kz300eh 100mhz +6kc80 kawasaki lsi cmos technology z80 vhdl kc80 pga pin count lsi 176	PDF
LSI CMOS GATE ARRAY Abstract: LSI Logic ASIC Contextual Info: CMOS ASIC Translation Of Existing ASIC Designs Introduction It has only been in the last few years that designers and users of application specific integrated circuits ASIC have been able to obtain additional sources for these types of integrated circuits.	Original	lsi cmos gate array lsi logic asic	PDF

LSI CELL LIBRARY Search Results

LSI CELL LIBRARY Result Highlights (5)

LSI CELL LIBRARY Datasheets Context Search

headland 386

G12-l

LC97000

ARM1156T2-S

ddr phy

L69301

schottky diode sb 5400

CMOS Logic Family Specifications

LSI CMOS GATE ARRAY

LCA200K

lvds to eDP

LCA200K

4x4 barrel shifter with flipflop

d217e

LSI Logic

horizontals output transistor c 6093

standard cell library

LSI LOGIC

lsi logic arrays

1034-01

S3P4

AOI31

KC80 kawasaki

LSI CMOS GATE ARRAY