LS245 ONE DIRECTION Search Results

74LS245 buffer

Abstract: LS245 IEEE LS245 1N3064 1N916 54LS SN54LS245 SN74LS245
Contextual Info: 8 -B it B u ffer Transceiver MORE DETAIL SEE SECTION _ S N 5 4 /7 4 L S 2 4 5 i3 Features/B enefits Ordering Information • Three-state outputs drive bus lines • Low current PNP inputs reduce loading • Symmetric — equal driving capability In each direction

LS245

Abstract: DM54LS245
Contextual Info: LS245 National Semiconductor 54LS245/DM54LS245/DM74LS245 TRI-STATE Octal Bus Transceiver General Description PNP inputs reduce DC loading on bus lines Hysteresis at bus inputs improve noise margins Typical propagation delay times, port-to-port 8 ns Typical enable/disable times 17 ns

LS245

Abstract: ttl multiplexer AC119 LS241 LS374 LS74
Contextual Info: Application Note AC119 Implementing Three-State and Bidirectional Buses with Multiplexers in Actel FPGAs Three-state logic is used in conventional MSI logic devices to allow buses where multiple drivers are directly connected to one or more loads. Figure 1 shows a typical bus configuration

Contextual Info: 8-B it Buffer Transceiver S N 54LS245 Features/Benefits Ordering Information • Three-state outputs drive bus lines • Low current PNP inputs reduce loading • Symmetric — equal driving capability In each direction PART NUMBER TYPE TEMP POLARITY POWER

DM74LS245N

Abstract: LS245 74LS24 ab-10 national DM54LS245
Contextual Info: LS245 £ 3 National Semiconductor 54LS245/DM54LS245/DM74LS245 TRI-STATE Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchro­ nous two-way communication between data buses. The control function implementation minimizes external timing

LS245

Abstract: LS241 LS374 LS74
Contextual Info: Appl i cat i o n N ot e Implementing Three-State and Bidirectional Buses with Multiplexers in Actel FPGAs Three-state logic is used in conventional MSI logic devices to allow buses where multiple drivers are directly connected to one or more loads. Figure 1 shows a typical bus configuration

LS245

Abstract: texas instruments LS245
Contextual Info: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins

ls245

Abstract: LS245 one direction 1N3064 1N916 54LS SN54LS245
Contextual Info: 8 -B it B uffer Transceiver SN54LS245 F e a tu re s /B e n e fits O rdering Inform ation • Three-state outputs drive bus lines • Low current PNP inputs reduce loading • Symmetric — equal driving capability In each direction PART NUMBER TYPE TEMP POLARITY

Contextual Info: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins

LS245

Abstract: LS374S 3C534 ls567
Contextual Info: Snudi But Mighty; New Components Give You More Logic in Less Chips* Chuck Hastings and Suneel Rajpal Interface circuits are generally thought of as unglamorous bread-and-butter items. They have the humble role of being the “glue" which holds digital systems together. Contempo­

82c450

Abstract: ALS02A IBM POS schematics
Contextual Info: CHÏrai Functional Description Functional Description The 82C450 is part of the CHIPS 45x product family. This product is fully compatible to IBM's VGA standard at the gate, register, and BIOS level. It offers enhanced backward compatibility to EGA, CGA, Hercules, and MDA standards without using

74ls521

Abstract: DB25 Parallel connector PAL Decoder 16L8 PC87310EB NEL NE-18A 74LS125 tri-state buffer p20l8 LS521 working of IC 74ls244 as buffer 74LS245
Contextual Info: National Semiconductor Application Note 676 Welson Lin Steve Horeff December 1990 BACKGROUND The PC87310 integrates two UARTs a floppy disk controller with analog data separator one parallel port game port decode hard disk controller decode and standard PC-XT

HC 4066A

Abstract: CMOS 4001, 4011, 4070 and 4081 HC 4053A HC165A HC 4052A HC589A HC00A HC74A 4852A HC 125A
Contextual Info: BUFFERS/INVERTERS ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ

74LS245

Abstract: ls245 SN74LS245 SN74LS245N SN74LS245NSR SNJ54LS245J SN54LS245 SN54LS245J SN74LS245DBR SN74LS245DW
Contextual Info: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins

LS245

Abstract: SN74LS245 SN74LS245DW SN74LS245N LS245 one direction
Contextual Info: SN74LS245 Octal Bus Transceiver The SN74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input DR controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input

SN74LS245d

Abstract: SN74ls245 SN74LS245N
Contextual Info: SN74LS245 Octal Bus Transceiver The SN74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input DR controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input

SN74LS245N

Abstract: 74LS245 LS245 SN74LS245 SN74LS245DW SN74LS245DWR2 SN74LS245M SN74LS245MEL
Contextual Info: SN74LS245 Octal Bus Transceiver The SN74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input DR controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input

intel 8250 UART

Abstract: block diagram of ct scanner P82C605 82C605 82C606 8250 intel uart CHIPS TECHNOLOGIES delay line ms-31 ricoh marking LS245
Contextual Info: CÜHjlF^aÜ P R E L IM IN A R Y 8 2 C 6 0 5 /8 2 C 6 06 CH lPSpak/CH IPSport MULTIFUNCTION CO N TRO LLERS 100% Compatible to IBM" PC, XT and AT Fully compatible to the NS16450 Asynch­ ronous Communications Element, and the Motorola 146818A Real Time Clock

P82C606

Abstract: 82C605 82C606 NE558 intel 8250 UART LS245 NS16450 NE558 applications LS245 MOTOROLA SACX07
Contextual Info: P R E L IM IN A R Y 8 2 C 6 0 5 /8 2 C 6 06 CH lPSpak/CH IPSport MULTIFUNCTION CO N TRO LLERS 100% Compatible to IBM" PC, XT and AT Fully compatible to the NS16450 Asynch­ ronous Communications Element, and the Motorola 146818A Real Time Clock 82C606 only

SN74LS245

Abstract: LS245 80021012A 8002101SA
Contextual Info: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins

SN74LS245

Abstract: SN74LS245N 80021 SN54LS245 SN54LS245J SN74LS245DBR SN74LS245DW SN74LS245DWR SN74LS245NSR SNJ54LS245J
Contextual Info: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins

SN74LS245N PRICE

Abstract: 80021012A 8002101SA
Contextual Info: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins

80021012A

Abstract: 8002101SA
Contextual Info: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins

Contextual Info: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins