LS0006 Search Results

25S08

Abstract: 25S07
Contextual Info: 80S9ZU1V//0SSZUIV Am25S07/Am25S08 Hex/Q uad Parallel D Registers with Register Enable DISTINCTIVE CHARACTERISTICS • • • 4-bit and 6-bit high-speed parallel registers C ommon clock and com m on enable Positive edge triggered D flip-flops GENERAL DESCRIPTION

AM26S10

Contextual Info: Am26S10/Am26S11 Am26SlO/Am26S11 Quad Bus Transceivers DISTINCTIVE CHARACTERISTICS Input to bus is inverting on Am26S10 Input to bus is non-inverting on Am26S11 Quad high-speed open collector bus transceivers Driver outputs can sink 100mA at 0.8V maximum •

D Flip Flops

Abstract: 74ls175 pin diagram 74ls376 4LS08 74LS175 LS08 AM2919 CD0017
Contextual Info: 80S~ISZUJV/Z0S~ISZU1V A m 25LS 07/A m 25LS08 Hex/Q uad Parallel D Registers with Register Enable DISTINCTIVE CHARACTERISTICS • • • • 4-bit and 6-bit parallel registers Com m on Clock and Common Enable Positive edge triggered D flip flops Second sourced by Tl as 54LS/74LS37B and 379

bj 950 131- 6

Abstract: 74LS385 "serial adder" Am25LS14 serial adder AM25LS15PC bj 945 25ls22
Contextual Info: Am25LS15 Am25LS15 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • M a g n itu d e o n ly a d d itio n /s u b tra c tio n S e c o n d s o u rc e d b y T .l. a s A m 5 4 L S /7 4 L S 3 8 5 F o u r in d e p e n d e n t a d d e r/s u b tra c to rs

Contextual Info: Am25LS15 Am25LS15 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • Magnitude only addition/subtraction Second sourced by T.l. as Am54LS/74LS385 Four independent adder/subtractors Use with two's complement arithmetic GENERAL DESCRIPTION The Am25LS15 is a serial two's complement adder/

25LS09

Contextual Info: Am25LS09 Quad Two-Input, High-Speed Register DISTINCTIVE CHARACTERISTICS 4-bit register accepts data from one-of-two 4-bit input fields Edge triggered clock action Second sourced by T.l. as 54LS/74LS399 Am25LS D.C. parameters including: - Vol “ 0.45V at Iol “ 8mA

THR9

Contextual Info: Am 25LS23 8-Bit Shift/Storage Register with Synchronous Clear DISTINCTIVE CHARACTERISTICS • • • Cascadable shifting Second sourced by T.l. as 54LS/74LS323 Synchronous clear Three-state outputs Common input/output pins GENERAL DESCRIPTION The Am25LS23 is an 8-bit universal shift/storage register

25s09

Contextual Info: 60SSZUJV Am25S09 Quad Two-Input, High-Speed Register DISTINCTIVE CHARACTERISTICS • • Four-bit register accepts data from one of two 4-bit input fields. Edge-triggered clock action • • High-speed Schottky technology. Electrically tested and optically inspected dice for the

25LS07

Abstract: 25LS08 74ls175 p
Contextual Info: 80S~ISZUJV/Z0S~ISZUJV Am25LS07/Am25LS08 Hex/Quad Parallel D Registers with Register Enable DISTINCTIVE CHARACTERISTICS • • • • 4-bit and 6-bit parallel registers Common Clock and Common Enable Positive edge triggered D flip flops Second sourced by Tl as 54LS/74LS378 and 379

IC000090

Contextual Info: Am25LS2539 Am25LS2539 Dual One-of-Four Decoder with Three-State Outputs and Polarity Control DISTINCTIVE CHARACTERISTICS • • • Two independent decoders/demultiplexers Three-state outputs Buffered common polarity control A. C. parameters specified over operating temperature

AM25S07

Contextual Info: 80SSZU1V/Z0SSSUJV ! Am25S07/Am25S08 H ex/Q uad Parallel D Registers with Register Enable DISTINCTIVE CHARACTERISTICS • • 4-bit and 6-bit high-speed parallel registers Common clock and common enable • Positive edge triggered D flip-flops GENERAL DESCRIPTION

Contextual Info: Am25S18 Am25S18 Quad D Register with Standard and Three-State Outputs DISTINCTIVE CHARACTERISTICS Four three-state outputs 75MHz clock frequency • Advanced Schottky technology e Four D-type flip-flops e Four standard totem-pole outputs GENERAL DESCRIPTION

74LS384

Contextual Info: Am25LS14A A m 2 5 L S l4 A 8-Bit Serial/Parallel Two's Complement Multiplier DISTINCTIVE CHARACTERISTICS Two's complement multiplication without correction Magnitude only multiplication Catcadable for any number of bits 8-blt parallel multiplicand data input

am25s09

Contextual Info: 60SSZUJV Am25S09 Quad Two-Input, High-Speed Register DISTINCTIVE CHARACTERISTICS • Four-bit register accepts data from one of two 4-bit input • fields. Edge-triggered clock action H igh-speed Schottky technology. Electrically tested and optically inspected dice for th e

am25s09

Abstract: D3A transistor d2b bus
Contextual Info: 60SSZUJV Am25S09 Quad Two-Input, High-Speed Register DISTINCTIVE CHARACTERISTICS • Four-bit register accepts data from one of two 4-bit input • fields. Edge-triggered clock action H igh-speed Schottky technology. Electrically tested and optically inspected dice for th e

6S08

Abstract: 74S139 74S175
Contextual Info: Am25S07 / Am25S08 Am 25S07/Am 25S08 H ex/Q uad Parallel D Registers with Register Enable DISTINCTIVE CHARACTERISTICS • • • 4-bit and 6-bit high-speed parallel registers Common clock and com m on enable Positive edge triggered D flip-flops GENERAL DESCRIPTION

LS020

Abstract: pASIC 1 Family WIN32 VE0012
Contextual Info: Appendix M - Error Messages Appendix M: Error Messages This appendix is a reference of all SpDE messages. You may get error messages after different actions using QuickLogictools. 1. Export - QuickLogic from the Hierarchy Navigator’sProcess menu: Refer to the section of this appendix titledExport Design Verifier.

AM25LS23PC

Abstract: 74LS323 pin configuration am25ls23 SO-332
Contextual Info: Am25LS23 Am25LS23 8-Bit Shift/Storage Register with Synchronous Clear DISTINCTIVE CHARACTERISTICS • • • Cascadable shifting Second sourced by T.l. as 54LS/74LS323 Synchronous clear Three-state outputs Common input/output pins GENERAL DESCRIPTION The Am25LS23 is an 8-bit universal shift/storage register

74ls376

Abstract: 74ls175 pin diagram 74LS175 LS08 AM25LS07
Contextual Info: 80S~ISZUJV/Z0S~ISZU1V A m 25LS 07/A m 25LS08 Hex/Q uad Parallel D Registers with Register Enable DISTINCTIVE CHARACTERISTICS • • • • 4-bit and 6-bit parallel registers Com m on Clock and Common Enable Positive edge triggered D flip flops Second sourced by Tl as 54LS/74LS37B and 379

bj 950 131- 6

Abstract: 74LS385 Am2SLS14 Am25LS14 Am25LS15 25LS22
Contextual Info: m 2 5 L S 1 Am25LS15 A 5 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • Magnitude only addition/subtraction Second sourced by T.l. as Am 54LS /74LS385 Four independent adder/subtractors Use w ith tw o 's com plem ent arithm etic GENERAL DESCRIPTION

Contextual Info: Am25S18 Quad D Register with Standard and Three-State Outputs DISTINCTIVE CHARACTERISTICS • • Advanced Schottky technology Four D-type flip-flops Four standard totem-pole outputs Four three-state outputs 75MHz clock frequency GENERAL DESCRIPTION The Am25S18 consists of four D-type flip-flops with a

SUBTRACTOR IC

Contextual Info: Am25LS15 A m 2 5 LS 15 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • Four independent adder/subtractors Use with two's complement arithmetic • • Magnitude only addition/subtraction Second sourced by T.l. as Am54LS/74LS3S5 GENERAL DESCRIPTION

74LSl

Abstract: Am25LS07/08
Contextual Info: sosiszuiv/zosnszuiv Am25LS07/Am25LS08 Hex/Quad Parallel D Registers with Register Enable DISTINCTIVE CHARACTERISTICS • 4-bit and 6-bit parallel registers • Common Clock and Common Enable • Positive edge triggered D flip flops • Second sourced by Tl as 54LS/74LS378 and 379

QL24X32B-1PF144C

Abstract: vhdl code for 74194 QP-PL84G 74164 pin assignment ls 74138 74139 for bcd to excess 3 code PQ208 QL8X12B PF144 16 bit ripple adder
Contextual Info: QuickTools User's Guide with SpDE™ Reference January 1996 Copyright Information Copyright 1991, 1992, 1993, 1994, 1995 QuickLogic Corporation. All rights reserved. The information contained in this manual and the accompanying software program are protected by copyright; all rights are reserved by QuickLogic Corporation. QuickLogic