LS0003 Search Results

Contextual Info: Am29C827/Am29C828 Am29C927/Am29C928 Am29C827/Am29C828 Am29C927/Am29C928 High-Performance CMOS Bus Buffers DISTINCTIVE CHARACTERISTICS • • • High-speed CMOS buffers and inverters - D-Y delay = 7 ns typical Low standby power JEDEC FCT-compatible specs

AM29800

Abstract: 0E-T2
Contextual Info: *9 - I.986ZUJV Am29861 - 6 4 High Performance Bus Transceivers DISTINCTIVE CHARACTERISTICS • • Three-state outputs glitch-free during power-up and down. Outputs have Schottky clam p to ground 48m A com m ercial Io l . 32m A military Io l Low in p u t/o u tp u t capacitance

Contextual Info: ADV MICRO {MEMORY} fli 0257528 ADV MICRO MEMORY D E § 0557520 0055515 1 89D f-4 6 -2 3 -0 8 üf 25595 Am27S07 64-Bit Noninverting-Output Bipolar RAM > 3 PO DISTINCTIVE CHARACTERISTICS • • • Fully decoded 16-word x 4-bit low power Schottky RAMs Internal ECL circuitry for optimum speed/power perfor­

29828A

Contextual Info: Am29827A/Am29828A Am29827A/Am29828A High-Performance Buffers DISTIN CTIVE C H A R A C T E R IS T IC S • High-speed buffers and inverters - tpo = 5.0 ns Typical • 200-m V minimum input hysteresis on input data ports • Three-state outputs glitch-free during power-up and

asynchronous fifo vhdl

Abstract: 8 BIT ALU design with verilog/vhdl code full subtractor using ic 74138 74139 for bcd to excess 3 code vhdl code for 8bit bcd to seven segment display 32 BIT ALU design with verilog/vhdl code 74594 16 BIT ALU design with verilog/vhdl code B1516 RAM1024
Contextual Info: QuickWorks User Manual with SpDE Reference Release 2009.2.1 Contact Information QuickLogic Corporation 1277 Orleans Drive Sunnyvale, CA 94089 Phone: (408) 990-4000 (US) (905) 940-4149 (Canada) +(44) 1932-57-9011 (Europe) +(852) 2567-5441 (Asia) E-mail: info@quicklogic.com

29C863

Contextual Info: Am29C861 / Am29C863 Am29C961 / Am29C963 Am29C861/ Am29C863 Am29C961/ Am29C963 High-Performance CMOS Bus Transceivers DISTINCTIVE CHARACTERISTICS High-speed CMOS bidirectional bus transceivers - T-R delay = 7 ns typical Low standby power JEDEC FCT-compatible specs

6267 ic pin details

Contextual Info: P re lim in a ry a Am29C827A/Am29C828A Advanced Micro High-Performance CMOS Bus Buffers Devices DISTINCTIVE CHARACTERISTICS • High-speed CMOS buffers and inverters - D-Y delay - 4 ns typical • Low standby power • JEDEC FCT-compatible specs • Very high output drive

AM29800

Contextual Info: *9 - I.986ZUJV Am29861 - 6 4 High Performance Bus Transceivers DISTINCTIVE CHARACTERISTICS • • Three-state outputs glitch-free during power-up and down. Outputs have Schottky clam p to ground 48m A com m ercial Io l . 32m A military Io l Low in p u t/o u tp u t capacitance

am29863apc

Contextual Info: Am29861A/Am29863A VC986Z w V/Vl 986ZUJ V High-Performance Bus Transceivers DISTINCTIVE CH A RACTERISTICS • High-speed symmetrical bidirectional transceivers - tpo = 5 ns typical • 200-mV minimum input hysteresis on input data ports • Three-state outputs glitch-free during power-up and

AM29C827PC

Abstract: CD3024 PD3024 AM29C827
Contextual Info: Am29C827/Am29C828 Am29C927/Am29C928 Am29C827/Am29C828 Am29C927/Am29C928 High-Performance CMOS Bus Buffers DISTINCTIVE CHARACTERISTICS • • • High-speed CMOS buffers and inverters - D-Y delay = 7 ns typical Low standby power JEDEC FCT-compatible specs

CD001140

Contextual Info: Am29861 - 64 High Performance Bus Transceivers DISTINCTIVE CHARACTERISTICS • • High-speed symmetrical bidirectional transceivers - Noninverting tpo = 5.0ns typ - Inverting tpo - 4.5ns typ 200mV minimum input hysteresis on input data ports • • • •

Am29C900

Abstract: am29c827 AM29c928
Contextual Info: Am29C827/Am29C828 Am29C927/Am29C928 Am29C827/Am29C828 Am29C927/Am29C928 High-Performance CMOS Bus Buffers DISTINCTIVE CHARACTERISTICS High-speed CMOS buffers and inverters - D-Y delay = 7 ns typical Low standby power JEDEC FCT-compatible specs Io l “ 24 mA, Commercial and Military

Am29751

Abstract: 29707 A2707
Contextual Info: Am29705A/707 Am29705A/707 16-Word by 4-Bit 2-Port RAM DISTINCTIVE CHARACTERISTICS Am29707 offers 20% improved cycle tim e over Am29705A when used with Am29203 in three address architecture Am29705A is a pin-for-pin replacem ent fo r the Am29705 but is significantly fester on critical paths

GHOF 1-5

Abstract: CD3024 PD3024 CD001140 ti apl
Contextual Info: A m 29861A /A m 29863A High-Performance Bus Transceivers Am29861A/Am29863A DISTINCTIVE CHARACTERISTICS H igh-speed sym m etrical bidirectional transceivers - tp o = 5 ns typical 200-m V m inim um inp u t hysteresis on input data ports Thre e-sta te outp uts glitch -fre e during pow er-up and

Contextual Info: Am29861 - 64 High Performance Bus Transceivers DISTINCTIVE CHARACTERISTICS High-speed symmetrical bidirectional transceivers - Noninverting tpp = 5.0ns typ - Inverting tpo = 4.5ns typ 200mV minimum input hysteresis on input data ports Three-state outputs glitch-free during power-up and

Am29751

Abstract: Am29203 AM29705 am29751a
Contextual Info: Am29705A/707 Am29705A/707 16-Word by 4-Bit 2-Port RAM DISTINCTIVE CHARACTERISTICS • • • • • Am29707 offers 20% improved cycle tim e over Am29705A when used with Am29203 in three address architecture Am29705A is a pin-for-pin replacem ent fo r the

LS020

Abstract: pASIC 1 Family WIN32 VE0012
Contextual Info: Appendix M - Error Messages Appendix M: Error Messages This appendix is a reference of all SpDE messages. You may get error messages after different actions using QuickLogictools. 1. Export - QuickLogic from the Hierarchy Navigator’sProcess menu: Refer to the section of this appendix titledExport Design Verifier.

Contextual Info: Am29861A/Am29863A High-Performance Bus Transceivers Am29861A/Am29863A DISTINCTIVE CHARACTERISTICS • • • High-speed symmetrical bidirectional transceivers - tpo = 5 ns typical 200-mV minimum input hysteresis on input data ports Three-state outputs glitch-free during power-up and

Am29751

Abstract: am29751a AM707 am29203
Contextual Info: Am29705A/707 Am29705A/707 16-Word by 4-Bit 2-Port RAM DISTINCTIVE CHARACTERISTICS Am29707 offers 20% improved cycle tim e over Am29705A when used with Am29203 in three address architecture Am29705A is a pin-for-pin replacem ent fo r the Am29705 but is significantly fester on critical paths

QL24X32B-1PF144C

Abstract: vhdl code for 74194 QP-PL84G 74164 pin assignment ls 74138 74139 for bcd to excess 3 code PQ208 QL8X12B PF144 16 bit ripple adder
Contextual Info: QuickTools User's Guide with SpDE™ Reference January 1996 Copyright Information Copyright 1991, 1992, 1993, 1994, 1995 QuickLogic Corporation. All rights reserved. The information contained in this manual and the accompanying software program are protected by copyright; all rights are reserved by QuickLogic Corporation. QuickLogic

Contextual Info: Am29C861A/Am29C863A High-Performance CMOS Bus Transceivers _ PRELIMINARY_ > 3 DISTINCTIVE CHARACTERISTICS • • • • High-speed CMOS bidirectional bus transceivers - T-R delay = 4 ns typical Low standby power

VE0012

Abstract: VE0007 VL0005 SD0001 LS0200 VL0007 LS020 LS0003 ED0005 LS0006
Contextual Info: Appendix L - Error Messages Appendix L: Error Messages This appendix is a reference of all SpDE messages. You may get error messages after different actions using QuickWorks tools. 1. Export - QuickLogic from the Hierarchy Navigator’s Process menu: Refer to the section of this appendix titled Export Design Verifier.

mod 8 ring counter using JK flip flop

Abstract: memory card reader ckt diagram vhdl code for 8-bit BCD adder verilog code pipeline ripple carry adder 3-8 decoder 74138 pin diagram vhdl code for 8-bit parity checker Verilog code subtractor mod 4 ring counter using JK flip flop pin diagram priority decoder 74138 sentinel s21
Contextual Info: QuickWorks User’sGuide with SpDE Reference COPYRIGHT INFOR MATION Copyright 1991-1998 QuickLogic Corporation. All rights reserved. The information contained in this manual and the accompanying software program are protected by copyright; all rights are reserved by QuickLogic Corporation. QuickLogic Corporation reserves the right to make periodic modifications

74373 latch pin config

Abstract: 3-8 decoder 74138 pin diagram ci cd 4058 vhdl code for 74194 QL5064 pin diagram of 74109 7400 TTL QL8x12B-0PL68C 74194 shift register waveform Datasheet ci cd 4058
Contextual Info: QuickWorks User’s Guide with SpDE Reference COPYRIGHT INFORMATION Copyright 1991–1999 QuickLogic Corporation. All rights reserved. The information contained in this manual and the accompanying software program are protected by copyright; all rights are reserved by QuickLogic Corporation. QuickLogic