LPDDR3 JEDEC Search Results

Contextual Info: Agilent U7231B DDR3 and LPDDR3 Compliance Test Application for Infiniium Series Oscilloscopes Datasheet Test, debug and characterize your DDR3 and LPDDR3 designs quickly and easily The Agilent Technologies U7231B DDR3 and LPDDR3 compliance test application provides a fast and easy

G2986

Contextual Info: G2986 Global Mixed-mode Technology LPDDR2/LPDDR3 Termination Regulator Features „ „ „ „ „ „ „ „ „ „ „ „ „ General Description Support 1.2V LPDDR2/LPDDR3 and DDR IIIL 0.675VTT Requirements Input Voltage Range: 3V to 5.5V VLDOIN Voltage Range: 1.2V to 3.6V

LPDDR3 layout

Contextual Info: TI Information — Selective Disclosure TPS51116 www.ti.com SLUS609I – MAY 2004 – REVISED JANUARY 2014 Complete DDR, DDR2, DDR3, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 3-A LDO, Buffered Reference Check for Samples: TPS51116 FEATURES

Contextual Info: TI Information — Selective Disclosure TPS51116 www.ti.com SLUS609I – MAY 2004 – REVISED JANUARY 2014 Complete DDR, DDR2, DDR3, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 3-A LDO, Buffered Reference Check for Samples: TPS51116 FEATURES

Contextual Info: TPS51116-EP www.ti.com SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012 COMPLETE DDR, DDR2, DDR3, AND LPDDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 1-A LDO, BUFFERED REFERENCE Check for Samples: TPS51116-EP FEATURES 1 • 2 • Synchronous Buck Controller VDDQ

lpddr3

Abstract: TPS51716RUK FDMS CSD17309
Contextual Info: 16 17 S5 TP TPS51716 www.ti.com SLUSB94 – OCTOBER 2012 Complete DDR2, DDR3, DDR3L, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 2-A LDO, with Buffered Reference Check for Samples: TPS51716 FEATURES DESCRIPTION • The TPS51716 provides a complete power supply for

Contextual Info: NCP51200, NCV51200 3 Amp VTT Termination Regulator DDR1, DDR2, DDR3, LPDDR3, DDR4 The NCP51200 is a source/sink Double Data Rate DDR termination regulator specifically designed for low input voltage and low−noise systems where space is a key consideration.

Contextual Info: TPS51116-EP www.ti.com SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012 COMPLETE DDR, DDR2, DDR3, AND LPDDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 1-A LDO, BUFFERED REFERENCE Check for Samples: TPS51116-EP FEATURES 1 • 2 • Synchronous Buck Controller VDDQ

lpddr3

Abstract: LPDDR3 layout LPDDR3 jedec str 5 q 0765 POWER SUPPLY CIRCUIT RC VOLTAGE CLAMP snubber circuit lpddr3 controller
Contextual Info: TPS51116-EP www.ti.com SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012 COMPLETE DDR, DDR2, DDR3, AND LPDDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 1-A LDO, BUFFERED REFERENCE Check for Samples: TPS51116-EP FEATURES 1 • 2 • Synchronous Buck Controller VDDQ

Contextual Info: 16 17 S5 TP TPS51716 www.ti.com SLUSB94 – OCTOBER 2012 Complete DDR2, DDR3, DDR3L, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 2-A LDO, with Buffered Reference Check for Samples: TPS51716 FEATURES DESCRIPTION • The TPS51716 provides a complete power supply for

JESD209-2E

Abstract: MSO UPGRADE PACKAGE
Contextual Info: Memory Interface Electrical Verification and Debug DDRA Datasheet Address/Command Bus Capture: The MSO5000 or MSO70000 Series Mixed Signal Oscilloscope can be used to precisely qualify timing of ADD/DMD bus cycles Programmable Interface: Allows development of remote client support

Micron Technology

Contextual Info: Micron DRAM Products Overview August 2013 John Quigley – Micron FAE 2012 Micron Technology, Inc. All rights reserved. Products are warranted only to meet Micron’s production data sheet specifications. Information, products, and/or specifications are subject to change without notice. All information is provided on an “AS IS” basis without warranties of any kind. Dates are estimates only. Drawings are not to scale. Micron and

i5-4302Y

Contextual Info: Mobile 4th Generation Intel Core Processor Family, Mobile Intel® Pentium® Processor Family, and Mobile Intel® Celeron® Processor Family Datasheet – Volume 1 of 2 Supporting 4th Generation Intel® Core™ processor based on Mobile U-Processor and Y-Processor Lines

PIFE20161B-R47MS-39

Contextual Info: FAN53525 3.0A, 2.4MHz, Digitally Programmable TinyBuck Regulator Features Description • •    Fixed-Frequency Operation: 2.4 MHz The FAN53525 is a step-down switching voltage regulator that delivers a digitally programmable output from an input

Contextual Info: ECP5 Family Data Sheet Advance DS1044 Version 01.0, March 2014 ECP5 Family Data Sheet Introduction March 2014 Advance Data Sheet DS1044 Features  Higher Logic Density for Increased System Integration  Pre-Engineered Source Synchronous I/O • •

Contextual Info: ECP5 Family Data Sheet Advance DS1044 Version 1.1, June 2014 ECP5 Family Data Sheet Introduction March 2014 Advance Data Sheet DS1044 Features  Higher Logic Density for Increased System Integration  Pre-Engineered Source Synchronous I/O • • •

Contextual Info: ECP5 Family Data Sheet Preliminary DS1044 Version 1.2, August 2014 ECP5 Family Data Sheet Introduction August 2014 Preliminary Data Sheet DS1044 Features  Higher Logic Density for Increased System Integration  Pre-Engineered Source Synchronous I/O

QSFP28 I2C

Contextual Info: Arria 10 Device Overview 2013.09.04 AIB-01023 Subscribe Feedback Altera’s Arria FPGAs and SoCs deliver optimal performance and power efficiency in the midrange. By using TSMC's 20-nm process technology on a high-performance architecture, Arria 10 FPGAs and SoCs

lpddr3

Abstract: qfn jb PCME0630T LPDDR3 jedec
Contextual Info: TPS51363 www.ti.com SLUSBB5 – FEBRUARY 2013 22-V Input, 8-A or 10-A Converter With Integrated FET FEATURES DESCRIPTION • • • The TPS51363 is a high-voltage input, synchronous converter with integrated FET, based on D-CAP2 control topology, which enables fast transient

lpddr3

Abstract: LPDDR3 layout
Contextual Info: TPS51363 www.ti.com SLUSBB5 – FEBRUARY 2013 22-V Input, 8-A or 10-A Converter With Integrated FET Check for Samples: TPS51363 FEATURES DESCRIPTION • • • The TPS51363 is a high-voltage input, synchronous converter with integrated FET, based on D-CAP2

lpddr3

Contextual Info: TPS51363 www.ti.com SLUSBB5 – FEBRUARY 2013 22-V Input, 8-A or 10-A Converter With Integrated FET FEATURES DESCRIPTION • • • The TPS51363 is a high-voltage input, synchronous converter with integrated FET, based on D-CAP2 control topology, which enables fast transient

Contextual Info: TPS51367 www.ti.com SLUSBB7 – MARCH 2013 22-V Input, 12-A Integrated FET Converter With Ultra-Low Quiescent ULQ Check for Samples: TPS51367 FEATURES APPLICATIONS • • • • • • • 1 2 • • • • • • • • • Input Voltage Range: 3 V to 22 V

Contextual Info: TPS51363 www.ti.com SLUSBB5 – FEBRUARY 2013 22-V Input, 8-A or 10-A Converter With Integrated FET FEATURES DESCRIPTION • • • The TPS51363 is a high-voltage input, synchronous converter with integrated FET, based on D-CAP2 control topology, which enables fast transient

Contextual Info: TPS51363 www.ti.com SLUSBB5A – FEBRUARY 2013 – REVISED JUNE 2013 22-V Input, 8-A or 10-A Converter With Integrated FET Check for Samples: TPS51363 FEATURES DESCRIPTION • • • The TPS51363 is a high-voltage input, synchronous converter with integrated FET, based on D-CAP2