LPDDR3 Search Results

Contextual Info: Agilent U7231B DDR3 and LPDDR3 Compliance Test Application for Infiniium Series Oscilloscopes Datasheet Test, debug and characterize your DDR3 and LPDDR3 designs quickly and easily The Agilent Technologies U7231B DDR3 and LPDDR3 compliance test application provides a fast and easy

LPDDR3 layout

Contextual Info: TI Information — Selective Disclosure TPS51116 www.ti.com SLUS609I – MAY 2004 – REVISED JANUARY 2014 Complete DDR, DDR2, DDR3, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 3-A LDO, Buffered Reference Check for Samples: TPS51116 FEATURES

G2986

Contextual Info: G2986 Global Mixed-mode Technology LPDDR2/LPDDR3 Termination Regulator Features „ „ „ „ „ „ „ „ „ „ „ „ „ General Description Support 1.2V LPDDR2/LPDDR3 and DDR IIIL 0.675VTT Requirements Input Voltage Range: 3V to 5.5V VLDOIN Voltage Range: 1.2V to 3.6V

Contextual Info: NCP51200, NCV51200 3 Amp VTT Termination Regulator DDR1, DDR2, DDR3, LPDDR3, DDR4 The NCP51200 is a source/sink Double Data Rate DDR termination regulator specifically designed for low input voltage and low−noise systems where space is a key consideration.

Contextual Info: TI Information — Selective Disclosure TPS51116 www.ti.com SLUS609I – MAY 2004 – REVISED JANUARY 2014 Complete DDR, DDR2, DDR3, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 3-A LDO, Buffered Reference Check for Samples: TPS51116 FEATURES

Contextual Info: TPS51116-EP www.ti.com SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012 COMPLETE DDR, DDR2, DDR3, AND LPDDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 1-A LDO, BUFFERED REFERENCE Check for Samples: TPS51116-EP FEATURES 1 • 2 • Synchronous Buck Controller VDDQ

Contextual Info: TPS51116-EP www.ti.com SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012 COMPLETE DDR, DDR2, DDR3, AND LPDDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 1-A LDO, BUFFERED REFERENCE Check for Samples: TPS51116-EP FEATURES 1 • 2 • Synchronous Buck Controller VDDQ

lpddr3

Abstract: TPS51716RUK FDMS CSD17309
Contextual Info: 16 17 S5 TP TPS51716 www.ti.com SLUSB94 – OCTOBER 2012 Complete DDR2, DDR3, DDR3L, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 2-A LDO, with Buffered Reference Check for Samples: TPS51716 FEATURES DESCRIPTION • The TPS51716 provides a complete power supply for

Contextual Info: Agilent B4623B Bus Decoder for LPDDR, LPDDR2, or LPDDR3 Debug and Validation Data Sheet B4623B bus decode shown in listing window—LPDDR2 example. Description Accelerate your time to insight using the B4623B bus decoder for LPDDR, LPDDR2, or LPDDR3 debug and validation. The B4623B provides complete protocol decode of memory transactions using an Agilent logic analyzer as the analysis execution engine. The B4623B protocol-decode software translates acquired

lpddr3

Abstract: LPDDR3 layout LPDDR3 jedec str 5 q 0765 POWER SUPPLY CIRCUIT RC VOLTAGE CLAMP snubber circuit lpddr3 controller
Contextual Info: TPS51116-EP www.ti.com SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012 COMPLETE DDR, DDR2, DDR3, AND LPDDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 1-A LDO, BUFFERED REFERENCE Check for Samples: TPS51116-EP FEATURES 1 • 2 • Synchronous Buck Controller VDDQ

Contextual Info: 16 17 S5 TP TPS51716 www.ti.com SLUSB94 – OCTOBER 2012 Complete DDR2, DDR3, DDR3L, and LPDDR3 Memory Power Solution Synchronous Buck Controller, 2-A LDO, with Buffered Reference Check for Samples: TPS51716 FEATURES DESCRIPTION • The TPS51716 provides a complete power supply for

lpddr3

Contextual Info: 178-Ball Mobile LPDDR3 SDRAM Features Mobile LPDDR3 SDRAM EDF8132A1MC, EDFA232A1MA Features Options • VDD1/VDD2/VDDCA/VDDQ: 1.8V/1.2V/1.2V/1.2V • Array configuration – 256 Meg x 32 DDP – 512 Meg x 32 (QDP) • Packaging – 12.0mm x 11.5mm, 178-ball FBGA package

AM37xx

Abstract: SPRS616F bt.656 to MIPI digital cvbs encoder 640 480 RGB mipi bridge Cortex-A8 MIPI E2 nand flash 683 Transistor
Contextual Info: AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com AM3715, AM3703 Sitara ARM Microprocessors Check for Samples: AM3715, AM3703 1 AM3715, AM3703 Sitara ARM Microprocessors 1.1 Features 123456 • AM3715/03 Sitara ARM Microprocessors: – Compatible with OMAP 3 Architecture

lpddr3

Abstract: lpddr3 controller LPDDR3 layout TPS59116 str 5 q 0765 POWER SUPPLY CIRCUIT IRF7821 IRF7832 SSTL-18 DDR3 layout TI
Contextual Info: TI Information — Selective Disclosure TPS59116 www.ti.com SLUSA57 – NOVEMBER 2010 Complete DDR, DDR2 and DDR3 Memory Power Solution Synchronous Buck Controller, 3-A LDO, Buffered Reference for Embedded Computing Systems Check for Samples: TPS59116 FEATURES

Contextual Info: AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com AM3715, AM3703 Sitara ARM Microprocessors Check for Samples: AM3715, AM3703 1 AM3715, AM3703 Sitara ARM Microprocessors 1.1 Features 123456 • AM3715/03 Sitara ARM Microprocessors: – Compatible with OMAP 3 Architecture

Contextual Info: AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com AM3715, AM3703 Sitara ARM Microprocessors Check for Samples: AM3715, AM3703 1 AM3715, AM3703 Sitara ARM Microprocessors 1.1 Features 123456 • AM3715/03 Sitara ARM Microprocessors: – Compatible with OMAP 3 Architecture

Contextual Info: AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com AM3715, AM3703 Sitara ARM Microprocessors Check for Samples: AM3715, AM3703 1 AM3715, AM3703 Sitara ARM Microprocessors 1.1 Features 123456 • AM3715/03 Sitara ARM Microprocessors: – Compatible with OMAP 3 Architecture

SPRS507F

Abstract: ARMv6 Architecture Reference Manual transistor SS6 A 1051 A 12x12 cmos sensor 12-pin
Contextual Info: OMAP3530/25 Applications Processor www.ti.com SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009 1 OMAP3530/25 Applications Processor 1.1 Features • • OMAP3530/25 Applications Processor: – OMAP 3 Architecture – MPU Subsystem • Up to 720-MHz ARM Cortex™-A8 Core

Contextual Info: OMAP3515/03 Applications Processor www.ti.com SPRS505C – FEBRUARY 2008 – REVISED FEBRUARY 2009 1 OMAP3515/03 Applications Processor • • • OMAP3515/03 Applications Processor: – OMAP 3 Architecture – MPU Subsystem • 600-MHz ARM Cortex™-A8 Core

sprugn4

Abstract: H2V1 DM3730 MIPI dbi ABB transmitter ask 800 OMAP3630 MIPI DPI MIPI CVBS RGB mipi bridge DM3725
Contextual Info: DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED APRIL 2011 www.ti.com DM3730, DM3725 Digital Media Processors Check for Samples: DM3730, DM3725 1 DM3730, DM3725 Digital Media Processors 1.1 Features 123456 • DM3730/25 Digital Media Processors: – Compatible with OMAP 3 Architecture

UART buffer ic

Abstract: A20-A25
Contextual Info: AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com AM3715, AM3703 Sitara ARM Microprocessors Check for Samples: AM3715, AM3703 1 AM3715, AM3703 Sitara ARM Microprocessors 1.1 Features 123456 • AM3715/03 Sitara ARM Microprocessors: – Compatible with OMAP 3 Architecture

Contextual Info: OMAP3530, OMAP3525 www.ti.com SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013 OMAP3530 and OMAP3525 Applications Processors Check for Samples: OMAP3530, OMAP3525 1 OMAP3530 and OMAP3525 Applications Processors 1.1 Features 12 • OMAP3530 and OMAP3525 Devices:

Contextual Info: OMAP3515, OMAP3503 www.ti.com SPRS505H – FEBRUARY 2008 – REVISED OCTOBER 2013 OMAP3515 and OMAP3503 Applications Processors Check for Samples: OMAP3515, OMAP3503 1 OMAP3515 and OMAP3503 Applications Processors 1.1 Features 12 • OMAP3515 and OMAP3503 Devices:

H9ccnnn

Abstract: H9CKNNNB H5MS1G22AFRE3M H5MS2G22MFR-J3M H5MS2G62 H55S2622JFR-60M H9TKNNN2GDMP-LRNDM DDR333 H5MS2G62AFR-J3M H5MS1G22AFR-E3M
Contextual Info: Page 1 DENSI TY ORG. SPEED PART NUMBER Package FEATURE Availability 2Gb 64M x 16 166MHz H55S2G62MFP-60M FBGA 54ball 4Bank, 1.8V/ 1.8V Now 133MHz H55S2G62MFP-75M FBGA(54ball) 4Bank, 1.8V/ 1.8V Now 166MHz H55S2G22MFP-60M FBGA(90ball) 4Bank, 1.8V/ 1.8V Now 133MHz