LOCAL BUS PIN DIAGRAM Search Results

diagram LCD monochrome 14 pin to vga

Abstract: VGA 40 PIN LCD notebook CONNECTION DIAGRAM VGA 20 PIN LCD notebook CONNECTION DIAGRAM 40 pins lcd to 15 pins vga 486dx isa bios 15 pin vga pin out connections 486DX CA81 CL-GD6245 lcd 256 color
Contextual Info: CL-GD6245 * • CIRRUS LOGIC Advance Product Bulletin FEATURES ■ 176-pin (EIAJ standard VQ FP package — SmaH form factor — Thin (1.4 mm) package IR Direct connection to host bus — — — — ■ 32-bit ’486 local bus VESA® VL-Bus 16-bit’386 local bus

lt 6245

Contextual Info: CL-GD6245 * ^ Z i/^ ÎU S L O G IC @ Advance Product Bulletin FEATURES • 176-pin EIAJ standard VQFP package — Small form factor — Thin (1.4 mm) package IR Direct connection to host bus — — — — 32-bit ’486 local bus VESA VL-Bus 16-bit’386 local bus

2816 eeprom

Abstract: eeprom 2816 LAN9000 motorola 68000 microprocessor datasheet eeprom 2816 datasheet LAN91C96 MICROPROCESSOR 68000 motorola 68000 architecture 10BASE5 LAN91C100FD
Contextual Info: LAN91C96 Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet Data Brief Product Features ƒ Pin Compatible with the LAN91C92 in Local Bus Mode and the LAN91C94 in Both Local Bus and PCMCIA Modes Fully Supports Full Duplex Switched Ethernet

AX88796B

Abstract: AX88196B electronics FB19 100BASE-FX AX88196BLF MCS-51 NE2000 MAR6
Contextual Info: AX88196BLF Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller with MII Interface Features High-performance non-PCI local bus Support 8/16-bit local CPU interfaces include MCS-51 series, 80186 series CPU and ISA bus SRAM-like host interface, easily interfaced to most

AX88796BLI

Abstract: AX88796B AX88796BLF AX88196B mcr 5152 datasheet 8051 mcs51 electronics FB19 MCS-51 NE2000 MAR6
Contextual Info: AX88796BLF / AX88796BLI Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller Features High-performance non-PCI local bus Support both 8 bit and 16 bit local CPU interfaces include MCS-51 series, 80186 series CPU and ISA bus SRAM-like host interface, easily interfaced to most

74S245

Abstract: pin configuration 74LS32 74LS32 pin configuration 74LS764
Contextual Info: SCB68175 Signetics Bus Controller Preliminary Specification Microprocessor Products PIN CONFIGURATION DESCRIPTION FEATURES The Signetics SCB68175/8X821 Bus Controller is a high-speed bus requester and timing generator designed to inter­ face a local m aster typically, a m icro­

IEEE-796

Abstract: ic 80286
Contextual Info: in te i 82C288 BUS CONTROLLER FOR 80286 PROCESSORS 82C288-12,82C288-10, 82C288-8 Provides Commands and Controls for • Fully Static Device Local and System Bus Wide Flexibility in System Configurations a Available in 20 Pin PLCC (Plastic Leaded Chip Carrier) and 20 Pin Cerdip

Contextual Info: BUS CONTROLLER FOR 80286 MICROPROCESSORS KS82C288 FEATURES/BENEFITS D E S C R IP T IO N • Provides commands and control for local and system bus in 80286-based machines The 20-pin CMOS KS82C288 controls buses in 80286based computer systems. The Bus Controller provides

74S245

Abstract: 8x62 74LS32 PIN 74LS764 SCB68175C2I24 SCB68175C2N24 74LS32 pin configuration 74LS32 specification and configuration 8x821
Contextual Info: SCB68175 SigneHcs Bus Controller Preliminary Specification M icro p ro ce sso r P roducts PIN CONFIGURATION DESCRIPTION FEATURES The Signetics SCB68175/8X821 Bus C ontroller is a high-speed bus requester and timing generator designed to inter­ face a local master typically, a m icro­

IEEE-796

Abstract: VL82C2
Contextual Info: VLSI Tech n o lo gy , in c . VL82C288 CMOS BUS CONTROLLER FEATURES DESCRIPTION • Both local and system bus com­ mands and control are provided The VL82C288 Is a CMOS bus control­ ler for use in Intel 286-type microprocessor-based systems. A mode select pin

Contextual Info: 74ACT11623 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS059A - D2957, JULY 1987 - REVISED APRIL 1993 DW OR NT PACKAGE TOP VIEW Local Bus-Latch Capability Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin Vcc and GND Configurations

SA56004X

Abstract: 2n3904 npn 2N3904 2N3906 ADM1032 LM86 LM99 Pin-for-Pin Compatible with the
Contextual Info: SA56004x 8-pin, SMBus/I2C-bus remote/local digital temp sensor with over-temp alarms and ±1 °C accuracy Highly accurate temperature readings over a wider range and with lower power dissipation than most industry-standard devices. Semiconductors The Philips SA56004x is an 11-bit, remote/local digital temperature sensor

Flip-Flop 7473

Abstract: zl58 7473 latch
Contextual Info: Actel Mask Programmed Gate Arrays Features Description Mask Programmed versions of Actel Field Programmable Gate Arrays FPGAs Significant cost reduction for medium- to high-volume applications Pin-for-pin compatible with Actel FPGAs PCI Local Bus Revision 2 Compliant

74AC11623

Contextual Info: 74AC11623 OCTAL BUS TRANSCEIVER WITH 3–STATE OUTPUTS SCAS058A – JULY 1987 – REVISED APRIL 1993 • • • • • • DW OR NT PACKAGE TOP VIEW Local Bus-Latch Capability Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

74AC11623

Contextual Info: 74AC11623 OCTAL BUS TRANSCEIVER WITH 3–STATE OUTPUTS SCAS058A – JULY 1987 – REVISED APRIL 1993 • • • • • • DW OR NT PACKAGE TOP VIEW Local Bus-Latch Capability Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

74AC11623

Contextual Info: 74AC11623 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS058A − JULY 1987 − REVISED APRIL 1993 • • • • • • DW OR NT PACKAGE TOP VIEW Local Bus-Latch Capability Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

80286

Abstract: multibus MCE-4 S intel 80286 82C284 82C288 82C288-10 82C288-12 82C288-8 IEEE-796
Contextual Info: in te i 82C288 BUS CONTROLLER FOR 80286 PROCESSORS 82C288-12,82C288-10,82C288-8 Provides Commands and Controls for Local and System Bus Wide Flexibility in System Configurations High Speed CHMOS III Technology • Fully Static Device „ Ava)lab|e in 2o Pin PLCC (Plastic

74AC11623

Contextual Info: 74AC11623 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS058A − JULY 1987 − REVISED APRIL 1993 • • • • • • DW OR NT PACKAGE TOP VIEW Local Bus-Latch Capability Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

Contextual Info: SAMSUNG SEMICONDUCTOR INC 23E D 7U4142 OQOÖäOb 7 • T - £ 2 - 3 3- BUS CONTROLLER FOR 80286 MICROPROCESSORS KS82C288 FEATURES/BEN EFITS DESCRIPTIO N • Provides commands and control or local and system bus In 80286-based machines The 20-pin C M O S KS82G288 controls buses in 80286based computer systems. The Bus Controller provides

5 pin reset ic ARB

Abstract: 5 pin ic ARB ibm hardware mca
Contextual Info: T /zx.^ MCA 1200 • C Micro Channel* Bus Controller and Local Arbiter September 1988_ Distinctive Features_ Applications_ • Includes logic, high current drivers and buffers for master to Micro Channel* interface in slim 24 pin CMOS DIP

TRAY DIMENSIONS SOIC16

Contextual Info: NCV7425 Product Preview LIN Transceiver with Voltage Regulator and Reset Pin http://onsemi.com General Description The NCV7425 is a fully featured local interconnect network LIN transceiver designed to interface between a LIN protocol controller and the physical bus.

1F0H-1F7H configuration pio

Abstract: S3 TRIO 64 HT6560A HT6560B DAT00 6560B DD15 LD11 LD12 LD04
Contextual Info: HT6560B Enhanced VL_Bus IDE Controller Features • • • • • • • • Pin-to-pin backward compatible with HT6560A VL_Bus IDE controller IDE interface to 486 and 386 DX/SX local bus VESA VL_Bus rev 1.0 compatible Connects directly to VL_Bus and IDE interface, no extra TTL needed

Contextual Info: Actel Mask Programmed Gate Arrays F e a tu re s D e s c rip tio n Mask Programmed versions of Actel Field Programmable Gate Arrays FPGAs Significant cost reduction for medium- to high-volume applications Pin-for-pin compatible with Actel FPGAs PCI Local Bus Revision 2 Compliant

SN74LS622

Abstract: SN54LS623 SN74LS620 D2537 SN54LS620 SN54LS621 SN54LS622 SN74LS623 LS620
Contextual Info: TYPES SN54LS620 THRU SN54LS623, SN74LS620 THRU SN74LS623 OCTAL BUS TRANSCEIVERS D 2 5 3 7 , A U G U S T 1979 - Bidirectional Bus Transceivers in High-Density 20-Pin Packages Local Bus-Latch C apability TO P V IE W g a b In v e r tin g 'L S 6 2 1 O p e n - C o lle c to r