L4801 Search Results

Contextual Info: November 1998 PRELIMINARY ^Ék Micro Linear ML4805 Variable Feedforward PFC/PWM Controller Combo GENERAL DESCRIPTION FEATURES The ML4805 is a controller for power factor corrected, switched mode power supplies. S m ilar to the M L4801, the ML4805 may be used for voltage mode operation. Key

cx3804

Abstract: pegatron pegatron A35 A35 pegatron diode c0510 pegatron a24 Cx3808 q8607 IT8752E tpc8118
Contextual Info: 5 4 3 M52V BLOCK DIAGRAM 2 1 Power CPU VCORE PENRYN DC&QC Page 80 System Page 3~5 D D Page 81 FSB 1066MHz 1.5VS & 1.05VS LCD Panel Page 82 Page 45 PCIE x16 MXM CRT DDR2 800MHz CANTIGA nVIDIA NB9x Page 46 DDR & VTT DDR2 So-DIMM Page 83 Page 7~9 Page 70 +2.5VS

IT8511TE

Abstract: asus C5915 IT8511 C3923 J6801 c7319 R5707 T8-232 T2448
Contextual Info: 5 01 D C B A 4 Block Diagram 61 02 System Setting 62 USB CONN 03 * 63 * 04 04_CPU-Merom HOST 64 ISA ROM 05 05_CPU-Merom(PWR) 65 SPI ROM 06 * 66 LED 07 07_CRESTLINE(HOST) 67 * 08 08_CRESTLINE(DMI & CFG) 68 DC & BAT IN 09 09_CRESTLINE(GRAPHIC) 69 * 10 10_CRESTLINE(DDR2)

APPLE A6 CHIP

Abstract: cf325 W07 sot 23 C-492-5 SMD M05 sot23 C4977 cf406 p66 apple c5297 I342
Contextual Info: 8 6 7 PDF CSA CONTENTS IMG5 17" REV E 11/01/05 SYNC MASTER DATE PDF CSA CONTENTS TABLE_TABLEOFCONTENTS_HEAD 2 System Block Diagram FINO-DD 06/20/2005 TABLE_TABLEOFCONTENTS_ITEM 3 4 Power Block Diagram FINO-PC 06/20/2005 5 Table Items FINO-M23 08/26/2005 6

c5129

Abstract: C5149 C5148 88E8001 CPUTEST29H D4203 D4004 u6202 R6130 R6503
Contextual Info: 5 4 3 2 A6M 1 REVISION: 2.0 128-BIT AMD S1g1 D Unbuffer DDR2 SO-DIMM Channel A/B x16 HyperTransport 200/400/800 MHz 638 PIN PACKAGE LVDS nVIDIA Gigabit Ethernet RTL8111B PCI-E x1 CRT C51MV C TV OUT X8 /X4 HyperTransport 200/400/800 MHz BGA 468 PCMCIA 33MHz

Contextual Info: N o v e m b e r l9 9 8 PRELM MARY ^Ék Micro Linear L4801 Variable Feedforward PFC/PWM Controller Combo GEN ERAL D E S C R IP T IO N FEATU RES TheM L 4 8 0 1 is a c o n tr o lle r ib r p o w e r i â c t o r c o r te c te d , a »? itc h e d m o d e p ow e r s u p p lie s . K ey fe a t u ie s o f t h i s

rtm880t-792

Abstract: UP7704U8 RTM880T-792-LF K4N1G164QQ-HC25 L78012 PT8704 D7201 mb39a132 IT8752E RTM880T
Contextual Info: 5 4 3 2 1 N50Tr SCHEMATIC R110 D D Content PAGE PAGE Content SYSTEM PAGE REF. C B A 3 4 5 6 7 8 9 10 11 12 13 14 15 20 21 22 23 24 25 29 30 31 32 33 34 35 36 37 38 40 41 42 43 44 45 46 48 50 51 52 53 56 57 58 60 61 62 63 65 66 69 70 71 72 73 74 75 76 77 SCHEMATIC INFORMATION

L6503

Abstract: EC-IT8752 J3701 ASUS M50Vm realtek uwb C1136 IT8752 RX2023 C5814
Contextual Info: 5 4 3 2 1 M50Vm Montevina Block Diagram Penryn D D FAN + SENSOR CPU VCORE PAGE 50 PAGE 3,4,5 SYSTEM PWR PAGE 80 PAGE 81 VGA Daughter BD BAT & CHARGER CLOCK GEN ICS/9LPR363 FSB 1066MHz VGA VCORE PAGE 88 PAGE 29 Other PWR PAGE 82, 83, 84, 85, 90, 91, 92, 93, 94

ITE IT8502E

Abstract: IT8502E R5U230 RT8206A SC8825 IT8301E 9LRS3197 D4802 ICS9LRS3197 MAX17028
Contextual Info: 5 4 SYSTEM PAGE REF. Content PAGE D C B 1 2 3 4 5 6 7 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 36 37 40 43 44 45 46 47 48 50 51 52 53 56 57 58 60 61 64 65 66 67 70 Block Diagram System Setting CPU 1 _DMI,PEG,FDI,CLK,MISC CPU(2)_DDR3 CPU(3)_CFG,RSVD,GND

PAL 012a

Abstract: U5404 88E8001 asus circuit pal 012A C30015 IC U5502 C23010 78L05 D4004
Contextual Info: 5 4 3 2 A6T 1 REVISION: 1.01 128-BIT AMD S1g1 Channel A/B D Unbuffer DDR2 SO-DIMM cc x16 HyperTransport 200/400/800 MHz 638 PIN PACKAGE LVDS nVIDIA Gigabit Ethernet RTL8111B PCI-E x1 C51MV nVIDIA PCI-E x16 CRT G73M X8 /X4 HyperTransport 200/400/800 MHz FWH

PAL 012a

Abstract: 88E8001 HP C6602 ALC660 Asus C30023 MCP51 R30I R6015 C31002
Contextual Info: 5 A 4 3 2 A6Tc 1 REVISION: 2.1 128-BIT AMD S1 Channel A/B x16 D Unbuffer DDR2 SO-DIMM HyperTransport 200/400/800 MHz 638 PIN PACKAGE LVDS nVIDIA Gigabit Ethernet RTL8111B PCI-E x1 C51MV nVIDIA CRT PCI-E x16 G72MV BGA 468 C SDTV X8 /X4 HyperTransport 200/400/800

IRLM2402

Abstract: c4977 cf325 NEC c5292 VD357 C5292 nec NEC "C4305" cf406 C4934 C5248
Contextual Info: 8 6 7 2 3 4 5 CK APPD FINO M23 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 1 REV ZONE ECN ENG APPD DESCRIPTION OF CHANGE DATE 19 397409 ENGINEERING RELEASED

F3J inverter board

Abstract: D9302 it8511te F3J inverter IT8511 a2051 asus c5121 00 F3J INVERTER CABLE Intel t9300
Contextual Info: 5 Block Diagram 61 02 System Setting 62 C * 63 * 04_CPU-Merom HOST 64 ISA ROM 05 05_CPU-Merom(PWR) 65 SPI ROM * 66 B A GDDR2 32Mx16 x4 07_CRESTLINE(HOST) 67 * 08 08_CRESTLINE(DMI & CFG) 68 DC & BAT IN 09 09_CRESTLINE(GRAPHIC) 69 * 10 10_CRESTLINE(DDR2) 70

IT8500E-L

Abstract: it8500e UP7711U8 JRST2001 EMB20N03V UP7714BMA5-00 IT8500 JMC251 parade ps8101 PCH Ibex Peak-M
Contextual Info: 5 4 3 2 1 K42F SCHEMATIC For BOM Rev1.0 Power VCORE Page 80 System D Page 81 BLOCK DIAGRAM D 1.5VS & 1.05VS Page 82 DDR & VTT Page 83 HDMI HDMI AMD PARK-XT-S3 DDR3 800/1066MHz CPU PCIE x16 ARRANDALE +2.5VS DDR3 SO-DIMM Page 84 Page 16~18 CRT CRT LVDS Page 70

M51VA

Abstract: AC82GM45 SLB97 L3803 ALC662 a7s mainboard jp8800 L3404 T0606 panasonic ER 203 charger circuit T0608
Contextual Info: 5 4 3 2 1 F8V L80V N80V N81 Montevina Block Diagram DC_IN & BAT CON PAGE 60 Penryn D SW & LED FAN + SENSOR CPU VCORE PAGE 50 PAGE 3,4,5 SYSTEM PWR PAGE 80 FSB 1066MHz PAGE 46 LVDS & INV PAGE 45 C Other PWR PAGE 82, 83, 84, 85, 90, 91, 92, 93, 94 G MCH Cantiga

IT8500E-L

Abstract: it8500e L7206 1.2 it8500 k52jr UP7711U8 ICS9LPR427 ALC269 PT8528 UP7714BMA5-00
Contextual Info: 5 4 SYSTEM PAGE REF. Content PAGE D C B A 1 2 3 4 5 6 7 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 36 37 38 40 41 42 43 44 45 46 47 48 50 51 52 53 56 57 60 61 Block Diagram System Setting CPU 1 _DMI,PEG,FDI,CLK,MISC CPU(2)_DDR3 CPU(3)_CFG,RSVD,GND

M7615

Abstract: IT8511TE ASUS t880 RN1014A L1307 IT8705F ASP-68200-07 IT8510 ATXP1
Contextual Info: 5 4 3 %/ &PSGO MEKVEQ AMD REV.F D CPU VCORE 2 DDR2-800MHz CLOCK GENERATOR Dual Channel DDR2 Up to 2GB DDRII PAGE 5,6,7,8 PAGE 22 LED&SW&TOUCHPAD ATI M76-M TV OUT PAGE 23 ATI RS690M PCIE *16 DVI PAGE 50 H.T 800 MHz 1600MT/s CRT PAGE 23 D PAGE 16 SO-DIMM X 2

Contextual Info: November 1998 PRELIMINARY ^Ék Micro Linear L4801 Variable Feedforward PFC/PWM Controller Combo GENERAL DESCRIPTION FEATURES The L4801 is a controller for power factor corrected, switched mode power supplies. Key features of this combined PFC and PWM controller are low start-up and

cf325

Abstract: Broadcom EMI NEC c5292 UE401 c5885 CF-325 CE015 CF219 I1016 C1900 PCB
Contextual Info: 8 6 7 PDF CSA CONTENTS SYNC MASTER DATE PDF CSA CONTENTS 2 System Block Diagram FINO-M23 08/26/2005 4 Power Block Diagram FINO-M23 08/26/2005 5 Table Items FINO-M23 10/07/2005 6 FUNC TEST 1 OF 2 FINO-M23 08/26/2005 7 POWER CONN / ALIAS M33-PC 06/20/2005 8

IT8752E

Abstract: aw-bt253 asus awbt253 J6001 SFI0402-050E330NP-LF J4210 L7405 CE1306 C7050
Contextual Info: 5 4 3 2 1 PROJECT N10I D D Revision 2008/04/24 Revision History SR R1.0 2008/01 Power States STATE SIGNAL Full ON SMB Signals Host Name Devices Address SLP_S3# SLP_S4# SLP_S5# +*VALWAYSP +*V +*VS Clocks HIGH HIGH HIGH ON ON ON ON S3 Suspend to RAM LOW HIGH

J5804

Abstract: IT8752TE Asus asus f3s SL606 asus schematic diagram sl605 IT8752E LTD121EX asus a7s
Contextual Info: 5 4 3 2 1 U6V: PENRYN/CANTIGA/ICH9-M/NB9M-GS BLOCK DIAGRAM Small-Board D PENRYN GDDR2 VRAM*4 32MX16 D Power Switch Board LED PAGE S6 PAGE 3~5 PAGE 42 FSB 1066MHz CLOCK GEN. ICS/9LPR363 LVDS PAGE 45 PCIE * 16 nVIDIA NB9M-GS CRT Small-Board PAGE 46 MCH CANTIGA

asus k53

Abstract: Asus k53 motherboard AR8131-AL1E RT8015BGQW ASUS P5 MOTHERBOARD CIRCUIT diagram asus crb input voltage point IT8301E R5U230 ar8121 RT8206A
Contextual Info: 5 4 3 2 1 SYSTEM PAGE REF. D C B A 01. Block Diagram 02. System Setting 03. CPU 1 _DMI,PEG,FDI,CLK,MISC 04. CPU(2)_DDR3 05. CPU(3)_CFG,RSVD,GND 06. CPU(4)_PWR 07. CPU(5)_XDP 16. DDR3(1)_SO-DIMM0 17. DDR3(2)_SO-DIMM1 18. DDR3(3)_CA/DQ Voltage 19. VID Controller