KLT21 Search Results

E142 wafer format

Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Contextual Info: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001  SCILLC, 2001 Previous Edition  2000 “All Rights Reserved”

KLT21

Abstract: hlt21 hl-t21
Contextual Info: MC10ELT21, MC100ELT21 5 V Differential PECL to TTL Translator The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of

KLT20

Abstract: k1648 klt22 KEL32 MC100 HEP64 KLT21 LP17 KEP32 HEP139
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite, ECLinPS Plus, ECLinPS MAX, and GigaComm Marking and Ordering Information Guide http://onsemi.com APPLICATION NOTE Prepared by: Paul Shockman ON Semiconductor HFPD Applications Engineer Introduction This application note describes the device markings and

kvt22

Abstract: KVL11 KPT23 ON Semiconductor marking k1648 KLT20 HEL16 KEL32 KEL01 xaa9646
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite and ECLinPS Plus Device Type and Date Code Marking Guide Gary Richards, ECL Logic Product Engineering http://onsemi.com APPLICATION NOTE need ON Semiconductor’s marking spec 12MON00232D and S.O.P. 7–19 ID of Products to Location of

KLT21

Abstract: kt21 BD-8 MC100ELT21 ELT21 HLT21 HT21 MC10ELT21
Contextual Info: MC10ELT21, MC100ELT21 5VĄDifferential PECL to TTL Translator The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of the

HLT21

Abstract: 74 TTL series k 3555 marking 84 MC10ELT21DG ELT21 KLT21 MC100 MC100ELT21 MC10ELT21
Contextual Info: MC10ELT21, MC100ELT21 5 V Differential PECL to TTL Translator Description • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Output Flow Through Pinouts Operating Range: VCC = 4.75 V to 5.25 V with GND = 0 V Q Output Will Default LOW with Inputs Left Open or < 1.3 V

MC10ELT21DG

Abstract: ELT21 HLT21 KLT21 MC100 MC100ELT21 MC10ELT21
Contextual Info: MC10ELT21, MC100ELT21 5 V Differential PECL to TTL Translator Description • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Output Flow Through Pinouts Operating Range: VCC = 4.75 V to 5.25 V with GND = 0 V Q Output Will Default LOW with Inputs Left Open or < 1.3 V

ELT21

Abstract: HLT21 KLT21 MC100 MC100ELT21 MC10ELT21 MC10ELT21DG MC100ELT21DG
Contextual Info: MC10ELT21, MC100ELT21 5 V Differential PECL to TTL Translator Description • • • • • • 3.5 ns Typical Propagation Delay 24 mA TTL Output Flow Through Pinouts Operating Range: VCC = 4.75 V to 5.25 V with GND = 0 V Q Output Will Default LOW with Inputs Left Open or < 1.3 V

HLT21

Abstract: KLT21 ELT21 HT21 KT21 MC100ELT21 MC10ELT21
Contextual Info: MC10ELT21, MC100ELT21 5V Differential PECL to TTL Translator The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of

Contextual Info: MC10ELT21, MC100ELT21 5V Differential PECL to TTL Translator The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of

KLT21

Abstract: HLT21 kt21 MC10ELT21 ELT21 HT21 MC100ELT21
Contextual Info: MC10ELT21, MC100ELT21 5VĄDifferential PECL to TTL Translator The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of the

KLT21

Abstract: hlt21 k 3555 ELT21 HT21 KT21 MC100ELT21 MC10ELT21
Contextual Info: MC10ELT21, MC100ELT21 5 V Differential PECL to TTL Translator The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of

HEL16

Abstract: DEVICE MARKING CODE table onsemi marking marking code onsemi marking code onsemi Diode kel33 on semiconductor traceability marking soic HEL32 HEL12 HEL31 HEL05
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite, ECLinPS Plus, ECLinPS MAX, and GigaComm Marking and Ordering Information Guide http://onsemi.com APPLICATION NOTE Prepared by: Paul Shockman ON Semiconductor HFPD Applications Engineer Introduction This application note describes the device markings and

KLT21

Abstract: HLT21 ELT21 HT21 MC100ELT21 MC10ELT21 MC10ELT21DR2
Contextual Info: MC10ELT21, MC100ELT21 5V Differential PECL to TTL Translator The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of