K1 100E Search Results

PIV-1000

Abstract: BYT230PIV-1000 DIODE M4 marking BYT230PIV1000 BYT231PIV-1000 IR diodes 0B
Contextual Info: BYT230PIV-1000 BYT231PIV-1000 FAST RECOVERY RECTIFIER DIODES MAIN PRODUCT CHARACTERISTICS If a V v rrm V f (max) trr (max) 2 x 30 A 1000 V 1.8 V K2 A2 A2 l° ^ i K1 K1 M ' A1 K2 BYT231 PIV-1000 A1 i BYT230PIV-1000 80 ns FEATURES AND BENEFITS • ■ ■

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9-Bit Magnitude Comparator The M C 10E /100E 166 is a 9 -bit m agnitude com parator w hich compares the binary value of two 9-bit words and indicates whether one word is greater than, or equal to, the other. MC10E166 MC100E166

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8-Bit Scannable Register MC10E241 MC100E241 The MC10E/100E241 is an 8-bit shiftable register. Unlike a standard universal shift register such as the E141, the E241 features internal data feedback organized so that the SHIFT control overrides the HOLD/LOAD

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 4-Bit D Flip-Flop MC10E131 MC100E131 The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock C q LOW and using the Clock Enable_(CE) inputs for

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3-Bit 4:1 M ux-Latch M C10E156 M C100E156 The MC10E/100E156 contains three 4:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent, and output date is

DL140

Abstract: MC100E101 MC10E101
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 4ĆInput OR/NOR Gate MC10E101 MC100E101 The MC10E/100E101 is a quad 4-input OR/NOR gate. • 500ps Max. Propagation Delay • Extended 100E VEE Range of – 4.2V to – 5.46V • 75kΩ Input Pulldown Resistors QUAD 4-INPUT

MC100E104

Abstract: DL140 MC10E104 100E104
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quint 2ĆInput AND/NAND Gate MC10E104 MC100E104 The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used.

xnor gate motorola

Abstract: DL140 MC100E107 MC10E107
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quint 2ĆInput XOR/XNOR Gate MC10E107 MC100E107 The MC10E/100E107 is a quint 2-input XOR/XNOR gate. The function output F is the OR of all five XOR outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used.

diode b6 k 450

Abstract: DL140 MC100E166 MC10E166 0100G
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9ĆBit Magnitude Comparator MC10E166 MC100E166 The MC10E/100E166 is a 9-bit magnitude comparator which compares the binary value of two 9-bit words and indicates whether one word is greater than, or equal to, the other.

DL140

Abstract: MC100E157 MC10E157
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2:1 Multiplexer The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select SEL inputs. The individual select control makes the devices well suited for

DL140

Abstract: MC100E158 MC10E158
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 5ĆBit 2:1 Multiplexer The MC10E/100E158 contains five 2:1 multiplexers with differential outputs. The output data are controlled by the Select input SEL . • • • • • • MC10E158 MC100E158 600ps Max. D to Output

1PS300

Abstract: DL140 MC100E122 MC10E122
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9ĆBit Buffer The MC10E/100E122 is a 9-bit buffer. The device contains nine non-inverting buffer gates. MC10E122 MC100E122 • 500ps Max. Propagation Delay • Extended 100E VEE Range of – 4.2V to – 5.46 V • 75kΩ Input Pulldown Resistors

motorola D-latch

Abstract: MC100E150 DL140 MC10E150
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 6ĆBit D Latch MC10E150 MC100E150 The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent and input data transitions propagate through to the output. A

Motorola, Inc. identical in pinout to

Abstract: DL140 MC100E171 MC10E171
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3ĆBit 4:1 Multiplexer MC10E171 MC100E171 The MC10E/100E171 contains three 4:1 multiplexers with differential outputs. Separate Select controls are provided for the leading 2:1 mux pairs see logic symbol . The three Select inputs control which one of the

Contextual Info: SK10/100E151 6-Bit D Register HIGH-PERFORMANCE PRODUCTS Description Features • • • • • • • • • The SK10/100E151 offers 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new high-performance ECL systems.

circuit diagram of 16-1 multiplexer

Abstract: DL140 MC100E164 MC10E164
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 16:1 Multiplexer MC10E164 MC100E164 The MC10E/100E164 is a 16:1 multiplexer with a differential output. The select inputs SEL0, 1, 2, 3 control which one of the sixteen data inputs (A0 – A15) is propagated to the output.

DL140

Abstract: E143 MC100E143 MC10E143 Motorola TR 229
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9ĆBit Hold Register MC10E143 MC100E143 The MC10E/100E143 is a 9-bit holding register, designed with byte-parity applications in mind. The E143 holds current data or loads new data, with the nine inputs D0 – D8 accepting parallel input data.

DL140

Abstract: MC100E154 MC10E154
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 5ĆBit 2:1 MuxĆLatch MC10E154 MC100E154 The MC10E/100E154 contains five 2:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent, and output data is

MC100E151

Abstract: DL140 MC10E151
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 6ĆBit D Register MC10E151 MC100E151 The MC10E/100E151 contains 6 D-type, edge-triggered, master-slave flip-flops with differential outputs. Data enters the master when both CLK1 and CLK2 are LOW, and is transferred to the slave when CLK1 or CLK2

1PS300

Abstract: DL140 MC100E155 MC10E155
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 6ĆBit 2:1 MuxĆLatch MC10E155 MC100E155 The MC10E/100E155 contains six 2:1 multiplexers followed by transparent latches with single-ended outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent, and output data is

MC100E151

Abstract: MC10E151 SK10E151PJ SK10E151PJT AN-1005 MR520
Contextual Info: SK10/100E151 6-Bit D Register HIGH-PERFORMANCE PRODUCTS Description Features • • • • • • • • • The SK10/100E151 offers 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new high-performance ECL systems.

DL140

Abstract: MC100E163 MC10E163
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 2ĆBit 8:1 Multiplexer MC10E163 MC100E163 The MC10E/100E163 contains two 8:1 multiplexers with differential outputs and common select inputs. The select inputs SEL0, 1, 2 control which one of the eight data inputs (A0 – A7, B0 – B7) is propagated to the

MC100E151

Abstract: MC10E151 SK10E151PJ SK10E151PJT
Contextual Info: SK10/100E151 6-Bit D Register HIGH-PERFORMANCE PRODUCTS Description Features • • • • • • • • • The SK10/100E151 offers 6 edge-triggered, high-speed, master-slave D-type flip-flops with differential outputs, designed for use in new high-performance ECL systems.

SK10 Boards

Abstract: 100E131 MC100E131 MC10E131 SK100E131PJ SK100E131PJT SK10E131PJ SK10E131PJT me-450
Contextual Info: SK10/100E131 4-Bit D Flip-Flop HIGH-PERFORMANCE PRODUCTS Description The SK10E/100E131 is a Quad master-slave D-type flipflop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock CC LOW and using the Clock Enable (CE*) inputs for clocking.