550PS Search Results

SY100E158

Abstract: SY10E158 SY10E158JC SY10E158JCTR
Contextual Info: 5-BIT 2:1 MULTIPLEXER FEATURES DESCRIPTION • 550ps max. D to output ■ Extended 100E VEE range of –4.2V to –5.5V The SY10/100E158 offer five 2:1 multiplexers with differential outputs, designed for use in new, highperformance ECL systems. The multiplexer operation is controlled by the SEL Select

Contextual Info: SY10E158 SY100E158 FINAL 5-BIT 2:1 MULTIPLEXER FEATURES DESCRIPTION • 550ps max. D to output ■ Extended 100E VEE range of –4.2V to –5.5V The SY10/100E158 offer five 2:1 multiplexers with differential outputs, designed for use in new, highperformance ECL systems.

SY100E158

Abstract: SY10E158 SY10E158JC
Contextual Info: 5-BIT 2:1 MULTIPLEXER Micrel, Inc. FEATURES DESCRIPTION • 550ps max. D to output ■ Extended 100E VEE range of –4.2V to –5.5V The SY10/100E158 offer five 2:1 multiplexers with differential outputs, designed for use in new, highperformance ECL systems.

Nippon capacitors

Contextual Info: MOTOROLA Order this document by MPC972/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC972 MPC973 The MPC972/973 are 3.3V compatible, PLL based clock driver devices targeted for high performance CISC or RISC processor based systems. With output frequencies of up to 125MHz and skews of 550ps

Contextual Info: * SY N ER G Y S V' ! f i b 1 h 7 Q U A D 2 1 M U L T I PL E KEF; V 1ODE 1 S7 S E M IC O N D U C T O R FEATURES • Individual select controls ■ Extended 100E V e e range of -4 .2 V to -5 .5 V ■ 550ps max. D to Output ■ 800ps max. SEL to Output DESCR

SY100E158

Abstract: SY10E158 SY10E158JC pin diagram of mux
Contextual Info: * S Y N E R fíV 5 -B IT 2:1 M U L T IP L E X E R SY10E158 SY100E158 S E M IC O N D U C T O R FEATURES DESCRIPTION I 550ps max. D to output The SY10/100E158 offer five 2:1 multiplexers with differential outputs, designed for use in new, high­ performance ECL systems.

SY100E157

Abstract: SY100E157JC SY100E157JCTR SY10E157 SY10E157JC SY10E157JCTR MUX25
Contextual Info: SY10E157 SY100E157 SYNERGY SEMICONDUCTOR SY10E157 SY100E157 QUAD 2:1 MULTIPLEXER SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES • Individual select controls ■ Extended 100E VEE range of –4.2V to –5.5V ■ 550ps max. D to Output ■ 800ps max. SEL to Output

Contextual Info: * 5-BIT 2:1 MULTIPLEXER SYNERGY SY10E158 SY100E158 SEMICONDUCTOR FEATURES DESCRIPTION • ■ ■ ■ ■ 550ps max. D to output 775ps max. SEL to output Differential outputs ESD protection of 2000V Fully compatible with industry standard 10KH, 100K ECL levels

Contextual Info: MOTOROLA Order this document by MPC972/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC972 MPC973 The MPC972/973 are 3.3V compatible, PLL based clock driver devices targeted for high performance CISC or RISC processor based systems. With output frequencies of up to 125MHz and skews of 550ps

AN1545

Abstract: MPC972
Contextual Info: MOTOROLA Order this document by MPC972/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC972 The MPC972 is a 3.3V compatible, PLL based clock driver device targeted for high performance CISC or RISC processor based systems. With output frequencies of up to 125MHz and skews of 550ps the

pin diagram of mux

Abstract: SY100E158 SY100E158JC SY10E158 SY10E158JC SY10E158JCTR
Contextual Info: SY10E158 SY100E158 SYNERGY SEMICONDUCTOR SY10E158 SY100E158 5-BIT 2:1 MULTIPLEXER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • 550ps max. D to output ■ Extended 100E VEE range of –4.2V to –5.5V ■ 775ps max. SEL to output ■ Differential outputs

Nippon capacitors

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low V o ltag e PLL C lock D river M PC972 M PC973 The MPC972/973 are 3.3V compatible, PLL based clock driver devices targeted for high performance CISC or RISC processor based systems. With output frequencies of up to 125MHz and skews of 550ps

Contextual Info: * SYNERGY SY10E158 SY100E158 5-BIT 2:1 MULTIPLEXER SEMICONDUCTOR FEATURES DESCRIPTION 550ps max. D to output Extended 100E V ee range of -4.2V to -5.5V 775ps max. SEL to output Differential outputs Fully compatible with industry standard 10KH, 100K ECL levels

Contextual Info: * QUAD 2:1 MULTIPLEXER SYNERGY SY10E157 SY100E157 SEMICONDUCTOR FEATURES DESCRIPTION • Individual select controls ■ ■ ■ ■ ■ ■ 550ps max. D to Output 800ps max. SEL to Output Internal 75K£1 Input pull-down resistors Extended 100E V ee range of -4.2V to -5.46V

Contextual Info: * SYNERGY SV1ÜE158 B I T 2:1 M U U I P L E X è n -Y100E158 SE M IC O N D U C T O R DESCRIPTION FEATURES • 550ps max. D to output ■ Extended 100E V ee range of -4.2V to -5.5V ■ 775ps max. SEL to output ■ Differential outputs ■ Fully compatible with industry standard 10KH,

SY100E157

Abstract: SY100E157JC SY10E157 SY10E157JC 38100E
Contextual Info: * QUAD 2:1 MULTIPLEXER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Individual select controls ■ ■ ■ ■ ■ SY10E157 SY100E157 550ps max. D to Output 800ps max. SEL to Output Internal 75K£1 input pull-down resistors Extended 100E V ee range of -4.2V to -5.46V

MPC972

Abstract: MPC973 3 phase waveform generator RS510 Nippon capacitors
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC972 MPC973 The MPC972/973 are 3.3V compatible, PLL based clock driver devices targeted for high performance CISC or RISC processor based systems. With output frequencies of up to 125MHz and skews of 550ps

Contextual Info: * SYNERGY SY10E158 SY100E158 5-BIT 2:1 MULTIPLEXER SEMICONDUCTOR FEATURES DESCRIPTION 550ps max. D to output Extended 100E V ee range of -4.2V to -5.5V 775ps max. SEL to output Differential outputs Fully compatible with industry standard 10KH, 100K ECL levels

MPC973

Abstract: RS510 AN1545
Contextual Info: MOTOROLA Order this document by MPC973/D SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver MPC973 The MPC973 is a 3.3V compatible, PLL based clock driver device targeted for high performance CISC or RISC processor based systems. With output frequencies of up to 125MHz and skews of 550ps the

Contextual Info: * SYNERGY SEMICONDUCTOR SY10E158 SY100E158 5-BIT 2:1 MULTIPLEXER FEATURES DESCRIPTION 550ps max. D to output Extended 100E V ee range of -4.2V to -5.5V 775ps max. SEL to output Differential outputs Fully compatible with industry standard 10KH, 100K ECL levels

Gigabit Logic

Abstract: 10G004-2C 10G004-2L 10G004-3C 10G004-3L 10G004-3X COMSEL
Contextual Info: I TEKTRONIX INC/ TRI ÛUINT 2L>E D El flTDbSlö D0003bl S O TRÖ _ Ê S T ^ ' 2 \S\ G i 9 0 B i t L ° 9 fc 1 0 0 0 0 4 Quad 2:1 Multiplexer 1.8 GHz/3.6 Gbit/s NRZ Data Rate 10G PicoLogic Family FEATURES • 3.6 Gbit/sec output NRZ data rate

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple D Flip-Flop With Set and Reset MC100LVEL30 M C100EL30 The MC100LVEL30 is a triple master-slave D flip flop with differential outputs. The MC100EL30 is pin and functionally equivalent to the MC100LVEL30 but is specified for operation at the standard 100E ECL

Contextual Info: www.fairchildsemi.com 637 $'&RQYHUWHUZLWK'HPX[HG2XWSXWV %LW0636 Features General Description • • • • • • • The SPT7722 is a high-speed, 8-bit analog-to-digital converter implemented in an advanced BiCMOS process. It is a performance-enhanced version of the SPT7721, offering better linearity and dynamic performance. An advanced folding

DDR266A

Abstract: DDR266B DDR333B EBD11UD8ADDA-6B EBD11UD8ADDA-7A EBD11UD8ADDA-7B E043-1
Contextual Info: DATA SHEET 1GB DDR SDRAM SO-DIMM EBD11UD8ADDA 128M words x 64 bits, 2 Ranks Description Features The EBD11UD8ADDA is 128M words × 64 bits, 2 ranks Double Data Rate (DDR) SDRAM Small Outline Dual In-line Memory Module, mounting 16 pieces of 512M bits DDR SDRAM sealed in TCP package. Read