IR TK 69 Search Results

Contextual Info: BUCHANAN Catalog 1308389 Terminal Blocks Revised 3-01 11 PIN SO CKET ASSEMBLIES P h y s ic a l P r o p e r t ie s 211BR, 311BR R a t in g : 10A, 150V S c r e w s : # 4 -4 0 zinc plated w ith clear chrom ate w ith w ire clam ps W ir e R a n g e : 1 4 -2 2 A W G

IC CD 4049

Abstract: 7561A STK6982
Contextual Info: SAN Y O S E M I C O N D U C T O R CORP 7b D[f| STK6972C DDDnflM □ M ~ D T -fgc/J-¡3 C IR C U IT D R A W I N G N O .B D 4 9 t h ic k film h y b r id 1C DC MOTOR DRIVER [2-CHANNELS 4054 Use • DC m otor fo r V T R , CD, etc. Features ■ Linear operation, bidirectional drive control

Contextual Info: KM736FV4022 KM718FV4022 PRELIMINARY 128Kx36 & 256KX18 SRAM 128Kx36 & 256Kx18 Synchronous Pipelined SRAM Rev. No. History Rev. 0.0 - Preliminary specification release Rev. 0.1 - Change specification format. No change was made in parameters. April, 1997 Preliminary

836BH-0268

Abstract: TSS0P16 TK14588 TK14 TK14584M TK14588V TSS0P-16 AMMS
Contextual Info: T K 1 4 5 8 4 M / / TK14588V T K 1 4 5 8 4 M /T K 1 4 5 8 8 V / J T A JjMÎ&m tëW±9bfè K 14584M : MFP12 (TK14588V : TSS0P16) ~22MHz 2.3-5.5V -lMHz m'M Vs—* =1>S<U—? (TK14588V , ~2Mbps) 'co77°y^—> 3 y ? - a 7 /v c o f e r t ^ ^ ig LSS<^3E1'^^¿á5fci9^i-(0Tr\ Jf-á ó W T * íié T é V '0

M5M4V16169TP-10

Abstract: mitsubishi scr
Contextual Info: MITSUBISHI LSIs M 5M 4V16169TP-10,-12,-15,-20 16M 1M-W0RD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M 5 M 4V 161 69T P is a 16M - bit Cached DRAM which integrates input registers, a 1 0 4 8 5 7 6 - w ord by 1 6 - bit dynamic m em ory array and a 1 0 2 4 - w ord by 1 6 - bit static

Contextual Info: 2 1 + * * 83 00 3 4 Series * * * Material ; * I n s u la t o r : UL 9 4 V - 0 PBT * C o n ta c t : P h o s p h o r Bronze + P la tin g : Tin p la te d 1 2 0 / / m in . o ver 3 0 ~ 5 0 y u ” nickel overall 2.540± 0.05 .lOOi.OOe ii— 3 - - ^ - - ^ —

Contextual Info: K7R323684M K7R321884M K7R320884M Preliminary 1Mx36 & 2Mx18 & 4Mx8 QDRTM II b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit QDRTM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. June 30, 2001 Advance 0.1 1. Package dimension modify.

Contextual Info: NOTES: D au g h tercard S o c k e t C o n n e c to rs E R EVISED PER ECR« 6900 NX6B0BA11A1AF 2. [3] |T| 5. BY A PPD DATE V.B.H. NX SERIES M e tC o n -2 TH IS CONNECTOR IS DESIGNED TO MEET THE A P P L IC A B L E PERFORMANCE REQUIREMENTS OF IEC 61076-4-101 AND BELLCORE GR-1217-CORE.

Contextual Info: IS61C632A m i 32K x 32 SYNCHRONOUS PIPELINED STATIC RAM SEPTEMBER 1997 FEATURES DESCRIPTION • The I S S I IS61C632A is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the i486 , Pentium™,

Contextual Info: O K I Semiconductor MSM51V16400 4 Meg x 4-Bit DYNAMIC RAM DESCRIPTION The MSM51V16400 is a 16 Megabit dynamic memory organized as 4,194,304 word by 4 bit. The technology used to fabricate the MSM51V16400 is OKI's CMOS silicon gate process technology. The device operates at a single +3.3V power supply. All inputs and outputs are LVTTL

Contextual Info: TOSHIBA TC55YD1837YB-333,-250 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT 524,288-WORD BY 36-BIT SYNCHRONOUS STATIC RAM SILICON GATE CMOS SigmaRAM, 21x1 Dp DESCRIPTION The TC55YD1837YB is a 18,874,368-bit synchronous I/O common Sigma SDR static random access memory

Contextual Info: ISSI IS61SP6464 64Kx 64 SYNCHRONOUS PIPELINE STATIC RAM PRELIMINARY APRIL 1999 FEATURES DESCRIPTION • Fast access time: The IS S IIS61SP6464 is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the i486 , Pentium™,

TK116XX

Contextual Info: RJTOKO _ TK116xxU ra iU H O IM ^ O T iFiODFDO^TD ^ THREE TERMINAL VOLTAGE REGULATOR FEATURES APPLICATIONS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Low Dropout Voltage Very Low Standby Current No Load

Contextual Info: DATA S H EE T_ MOS INTEGRATED CIRCUIT /¿PD464518L, 464536L 4M-BIT Bi-CMOS SYNCHRONOUS FAST STATIC RAM 256K-WORD BY 18-BIT / 128K-WORD BY 36-BIT LVTTL INTERFACE Description The ,uPD464518L is a 262,144 words by 18 bits, and the ,uPD464536L is a 131,072 words by 36 bits synchronous

CQ226

Abstract: tk 69 K7Z167285A
Contextual Info: K7Z167285A Preliminary 256Kx72 Double Late Write SigmaRAMTM Document Title 256Kx72 Double Late Write SigmaRAM TM Revision History Rev. No. 0.0 0.1 0.2 0.3 History Draft Date Remark 1. 1. 1. 1. November 2, 2000 March 30, 2001 May 16, 2001 July 18, 2001 Preliminary

P 6431

Abstract: IDT71P73104 IDT71P73204 IDT71P73604 IDT71P73804 ir tk 69 4410b 7326P
Contextual Info: Advance Information IDT71P73204 IDT71P73104 IDT71P73804 IDT71P73604 18Mb Pipelined DDR II SRAM Burst of 4 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Description 18Mb Density 2Mx8, 2Mx9, 1Mx18, 512Kx36 Common Read and Write Data Port Dual Echo Clock Output

Contextual Info: KM736FV4022 KM718FV4022 PRELIMINARY 128Kx36 & 256Kx18 SRAM Document Title 128Kx36 & 256Kx18 Synchronous Pipelined SRAM Revision History Rev. No. History Rev. 0.0 - Preliminary specification release Rev. 0.1 - Change specification format. No change was made in parameters.

PC1382C

Abstract: kflb 1382C PC1382 tv sound ic
Contextual Info: BIPOLAR ANALOG INTEGRATED CIRCUIT _ ¿¿PCI 382C TV SOUND IF PROCESSOR AND ATTENUATOR O IS C R IP T IO N MPC1382C is a T V sound 1C. It can be operated with no adjustment, using «ram ie filters externally- It contains a DC controlled attenuator, which has wide effective area and gentle characteristic in the chainging, so it is convenient especially for

V 7271 U

Abstract: 07280 d752
Contextual Info: PANASONIC INDL/ELEK 6932852 - C I O 7E üF|^32fl52 PANASONIC INDL*ELECTRONIC 72C LS TTL DN74LSS/U-X DOOTSTfl t> 07278 D DN74LS640/DN74LS640S DN 74LS640/DN 74LS640S Octal Bus Transceivers with 3 - state Outputs mm m DN74 L S 6 40/S l i , S t e f f i h 7 > X 5 -j ? / U y - A £ 8

mn1400

Abstract: MN1451B 1455B MN1450 MN1455B MN1455 mn1455bw 3 EO2 FR 455B MN1450B
Contextual Info: PANASONIC INDL/ELEK -CIO 7E DeT| bìBEfiSE 0D0S710 M |~ M N 1400 Family— 2 MN1455B MN1450B Series 6932852 PANASONIC 72C I N D L »E L E C T R O N I C 05710 MN1455B(MN1 450B Series R m m ) — ^ Ê fêlEÂ J CMOS 4 t y h • l f 1 7 7 ’ • V - f ¿ k it

c632a

Abstract: IS61C632A
Contextual Info: IS61C632A 32K x 32 SYNCHRONOUS PIPELINED STATIC RAM SEPTEMBER 1997 FEATURES DESCRIPTION • Fast access time: The IS S I IS61C632A is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, high­ performance, secondary cache for the i486 , Pentium™,

SMAJ15CA xm

Contextual Info: SMAJ SERIES DATA SHEET TRANSIENT VOLTAGE SUPPRESSOR – SMAJ SERIES FEATURE — — — — — — — — — — — For surface mounted applications in order to optimize board space. Low profile package. Built-in strain relief. Glass passivated junction. Low inductance.

Contextual Info: WESTCODE An Date:- 3 Aug, 2006 Data Sheet Issue:- 2 IXYS Company Provisional Data High Power Sonic FRD Type E1500NH48P Absolute Maximum Ratings VOLTAGE RATINGS MAXIMUM LIMITS UNITS VRRM Repetitive peak reverse voltage note 1 4800 V VRSM Non-repetitive peak reverse voltage (note 1)

E1500NH48

Abstract: Tk 100A 2000A power diode qrr
Contextual Info: WESTCODE An Date:- 3 Aug, 2006 Data Sheet Issue:- 2 IXYS Company Provisional Data High Power Sonic FRD Type E1500NH48P Absolute Maximum Ratings VOLTAGE RATINGS MAXIMUM LIMITS UNITS VRRM Repetitive peak reverse voltage note 1 4800 V VRSM Non-repetitive peak reverse voltage (note 1)