IPD48 Search Results

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Abstract: 4606 C40B C40N OC-768
Contextual Info: IPAG - Innovative Processing AG Data Sheet Lotharstr. 55, D-47057 Duisburg, Germany - phone: +49 203 3792986, fax: +49 (203) 3794094 - www.ipag35.com IPD48_C40Z: 40 GHz PIN Diode Chip Applications The series IPD48 PINs are applicable for building up the next generation of high bit rate optoelectronic receivers for SONET/SDH (OC-768) including FEC and Ethernet applications.

anti-reflection coating

Abstract: C45N OC-768
Contextual Info: IPAG - Innovative Processing AG Product Overview Lotharstr. 55, D-47057 Duisburg, Germany - phone: +49 203 3792986, fax: +49 (203) 3794094 - www.ipag35.com Series IPD48 PIN Diode The Series IPD48 PINs are applicable for building the next generation of high bit rate optoelectronic receivers for SONET/SDH

D482445LGW-A70

Abstract: cwi 1011
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT /¿PD482444, 482445 4M-Bit Dual Port Graphics Buffer 256K-WORD BY 16-BIT D escrip tio n The /iPD482444 and ^PD482445 have a random access port and a serial access port. The random access port has a 4M-bit 262, 144 words x 16 bits memory cell array structure. The serial access port can perform clock

Contextual Info: DATA SHEET M FC" / _/ MOS INTEGRATED CIRCUIT ¿¿PD482444, 482445 4M-Bit Dual Port Graphics Buffer 256K WORDS BY 16 BITS Description The /iPD482444 and ¿i PD482445 have a random access port and a serial access port. The random access port has a 4M-bit 262,144 words x 16 bits memory cell array structure. The serial access port can perform

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Abstract: 4606 C45B C45N OC-768 IPD48-C45N
Contextual Info: IPAG - Innovative Processing AG Data Sheet Lotharstr. 55, D-47057 Duisburg, Germany - phone: +49 203 3792986, fax: +49 (203) 3794094 - www.ipag35.com IPD48_C45Z: 45 GHz PIN Diode Chip Applications The series IPD48 PINs are applicable for building up the next generation of high bit rate optoelectronic receivers for SONET/SDH (OC-768) including FEC and Ethernet applications.

IPD48C-45B

Abstract: IPD48C-45N OC-768
Contextual Info: IPAG - Innovative Processing AG IPD48C-45z: 45 GHz PIN Diode Applications The series IPD48 PINs are applicable for building up the next generation of high bit rate opto-electronic receivers for SONET/SDH OC-768 including FEC and Ethernet applications. Features

IPD48C-80B

Abstract: IPD48C-80N OC-768
Contextual Info: IPAG - Innovative Processing AG IPD48C-80z: 80 GHz PIN Diode Applications The series IPD48 PINs are applicable for building up the next generation of high bit rate opto-electronic receivers for SONET/SDH OC-768 including FEC and Ethernet applications. Due to the distinct phase linearity, the highbandwidth IPD48X-80z PINs are suitable

Innovative Processing AG

Abstract: 6 GHz PIN diode IPD48C-40B IPD48C-40N OC-768 10 GHz pin diode
Contextual Info: IPAG - Innovative Processing AG IPD48C-40z: 40 GHz PIN Diode Applications The series IPD48 PINs are applicable for building up the next generation of high bit rate opto-electronic receivers for SONET/SDH OC-768 and Ethernet applications. Features • True bandwidth of 40 GHz (-3dB)

D482234

Contextual Info: DATA SHEET NEC / / MOS INTEGRATED CIRCUIT //PD482234, 482235 2M-Bit Dual Port Graphics Buffer 256K-WORD BY 8-BIT D escription The iPD482234 and /iPD482235 have a random access port and a serial access port. The random access port has a 2M-bit 262,144 words x 8 bits memory cell array structure. The serial access port can perform clock operations

D482234

Abstract: D482234G5-70 d482235le D482235 icc20 sis 735 k7 TNC 24 mk 2 d482235g5-60 SES N 2402
Contextual Info: DATA SHEET NEC / / MOS INTEGRATED CIRCUIT //PD482234, 482235 2M-Bit Dual Port Graphics Buffer 256K-WORD BY 8-BIT D escription The iPD482234 and /iPD482235 have a random access port and a serial access port. The random access port has a 2M-bit 262,144 words x 8 bits memory cell array structure. The serial access port can perform clock operations

60 GHz PIN diode

Abstract: 4606 diode all C60B C60N C60Z OC-768 IPD48
Contextual Info: IPAG - Innovative Processing AG Data Sheet Lotharstr. 55, D-47057 Duisburg, Germany - phone: +49 203 3792986, fax: +49 (203) 3794094 - www.ipag35.com IPD48_C60Z: 60 GHz PIN Diode Chip Applications The series IPD48 PINs are applicable for building up the next generation of high bit rate optoelectronic receivers for SONET/SDH (OC-768) including FEC and Ethernet applications.

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Abstract: C80N OC-768
Contextual Info: IPAG - Innovative Processing AG Data Sheet Lotharstr. 55, D-47057 Duisburg, Germany - phone: +49 203 3792986, fax: +49 (203) 3794094 - www.ipag35.com IPD48_C80Z: 80 GHz PIN Diode Chip Applications The series IPD48 PINs are applicable for building up the next generation of high bit rate optoelectronic receivers for SONET/SDH (OC-768) including FEC and Ethernet applications.

60 GHz PIN diode

Abstract: diode PIN 60 Ghz 20 GHz PIN diode IPD48C-60B IPD48C-60N OC-768 pin diode
Contextual Info: IPAG - Innovative Processing AG IPD48C-60z: 60 GHz PIN Diode Applications The series IPD48 PINs are applicable for building up the next generation of high bit rate opto-electronic receivers for SONET/SDH OC-768 including FEC and Ethernet applications. Features

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT LINE BUFFER 5 K-WORD BY 16-BIT/10K-W ORD BY 8-BIT Description The /¿PD485506 is a high speed FIFO First In First Out line buffer. Word organization can be changed either 5,048 words by 16 bits or 10,096 words by 8 bits.

NL1031

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT /¿ P D 4 8 8 3 0 L 8M-BIT Rambus DRAM 1M-WORD X 8-BIT X 1-BANK Description The 8-Megabit Ram bus DRAM RD R A M ™ is an extremely-high-speed C M O S DRAM organized as 1M w ords by 8 bits and capable of bursting up to 256 bytes of data at 2 ns per byte. The use of Ram bus Signaling

Contextual Info: PRELIMINARY DATA SHEET_ MOS INTEGRATED CIRCUIT ¿¿PD488448, 488488 128/144 M-bit Direct Rambus DRAM Description The Direct Rambus DRAM Direct RDRAM™ is a general purpose high-performance memory device suitable for use in a broad range of applications including com puter memory, graphics, video, and any other application where

Contextual Info: JJPD485506 Line Buffer for Communications Systems NEC Electronics Inc. Description Pin Configurations The /j PD485506 is a 5048-w ord by 16-bit d ual-port line buffer fab ric a te d w ith a silicon-gate CM OS process. T he device is capab le of asynchronous read and w rite

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT /¿PD488170L 18M-BIT Rambus DRAM 1M-WORD X 9-BIT X 2-BANK Description The 18-Megabit Rambus DRAM RDRAM™ is an extrem ely-high-speed CMOS DRAM organized as 2M w o rds by 9 bits and capable o f bursting up to 256 bytes of data at 2 ns per byte. The use o f Rambus S ignaling

Contextual Info: NEC NEC Electronics Inc. IPD482444, 482445 4M Video RAM Preliminary Information_ Description The ¿/PD482444 fast-page and /UPD482445 hyper-page video RAMs have a random access p o rt and a serial read/write port. The serial read/write p o rt is connected

mkph

Abstract: LG concurrent RDRAM Concurrent RDRAM IIPD488170 IPD488170LVN-A40-9 IPD488170LVN-A50-9 905 nec IC-3384 concurrent rdram NEC NEC RDRAM concurrent
Contextual Info: Rambus DRAM PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT |liP D 4 8 8 1 7 0 18M bit Rambus DRAM 1 Mword x 9bit x 2bank Description H The 18-Megabit Rambus DRAM (RDRAM™) is an extremely-high-speed CMOS DRAM organized asy|M w o r th y 9 bits and capable of bursting up to 256 bytes of data at 2 ns per byte. The use of Rambus Signaling

UPD482445GW-70

Abstract: UPD482445
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT UPD482444, 482445 4M-Bit Dual Port Graphics Buffer 256K-WORD BY 16-BIT D es crip tio n The ,uPD482444 and ,uPD482445 have a random access port and a serial access port. The random access port has a 4M-bit 262, 144 words x 16 bits memory cell array structure. The serial access port can perform clock

uPD488031

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT 8M-BIT Rambus DRAM 1M-WORD X 8-BIT X 1-BANK Description The 8-Megabit Rambus DRAM RDRAM™ is an extremely-high-speed CMOS DRAM organized as 1M words by 8 bits and capable of bursting up to 256 bytes of data at 2 ns per byte. The use of Rambus Signaling Logic (RSL)

TA51B

Contextual Info: PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT /¿ P D 4 8 8 1 3 0 L 16M-BIT Rambus DRAM 1M-WORD X 8-BIT X 2-BANK Description The 16-M egabit Rambus DRAM RDRAM™ is an extrem ely-high-speed CMOS DRAM organized as 2M w ords by 8 bits and capable o f bursting up to 256 bytes of data at 2 ns per byte. The use of Rambus S ignaling

D481850

Abstract: NEC D481850 D481
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT 481850 ¿ ÎP D 8M-bit Synchronous GRAM Description The ¿¿PD481850 is a synchronous graphics memory SGRAM organized as 131,072 words x 32 bits x 2 banks random access port. This device can operate up to 100 MHz by using synchronous interface. Also, it has 8-column Block Write function