IO113 Search Results

RT3PE600L

Abstract: RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1
Contextual Info: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging

Advanced Boot Block Flash

Abstract: AES-128 CS201 CS281 CS289 AGLP125
Contextual Info: v1.5 IGLOO PLUS Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

A3P600

Abstract: A3P060 A3P1000 A3P125 A3P250 AECQ100 AEC-Q100 FG144 FG256 FG484
Contextual Info: v1.0 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches High-Temperature AEC-Q100–Qualified Devices • Grade 2 105°C TA 115°C TJ • Grade 1 125°C TA (135°C TJ)

A3PE1500

Abstract: A3PE3000 IO23PDB0V2 IO23NDB0V2 IO30PDB1V1 IO05PDB0V0 IO06PDB0V1 IO32PDB1V1 IO10PDB0V1 IO283PDB7V1
Contextual Info: ProASIC3E Packaging 3 – Package Pin Assignments 208-Pin PQFP 1 208 208-Pin PQFP Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .

A3PE3000L FG484

Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
Contextual Info: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for

A3P250

Abstract: A3P060 A3P1000 Datasheet A3P125 IO97RSB2 IO52NDB1 FBGA A3P250 fbga 256 A3P250 ACTEL ACTEL FBGA 144
Contextual Info: Automotive ProASIC3 Packaging 3 – Package Pin Assignments 100-Pin VQFP 100 1 Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .

AFS600-FG256

Abstract: zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180
Contextual Info: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator

729-Pin

Abstract: Axcelerator FPGAs AX125 IO126PB3F11 AG18 FBGA 896 896-Pin Axcelerator Family FPGAs
Contextual Info: Axcelerator Family FPGAs Package Pin Assignments 180-Pin CSP A1 Ball Pad Corner 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P Figure 3-1 • 180-Pin CSP Bottom View Note For Package Manufacturing and Environmental information, visit Resource center at

Contextual Info: Revision 22 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

AES-128

Abstract: FG256 FG484
Contextual Info: v2.0 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power

A54 ZENER

Abstract: AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM
Contextual Info: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents

Contextual Info: Revision 15 ProASIC3 Flash Family FPGAs with Optional Soft ARM Support Features and Benefits Advanced I/O High Capacity • 15 K to 1 M System Gates • Up to 144 Kbits of True Dual-Port SRAM • Up to 300 User I/Os Reprogrammable Flash Technology • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS

ARMv6

Abstract: cortex a15 core Cortex-m1 Cortex R4 TRANSISTOR ww1 AES-128 FG256 FG484 T8 851
Contextual Info: v1.2 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power

CPLD

Abstract: CS-289
Contextual Info: Revision 14 IGLOO PLUS Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

TQFP144 DIMENSION

Abstract: ST70134 ST70235A STLC60135 TQFP144 ifft transmitter IP113 scrambler solomon
Contextual Info: ST70235A ASCOTTM DMT TRANSCEIVER PRELIMINARY DATA • DMT MODEM FOR CPE ADSL, COMPATIBLE WITH THE FOLLOWING STANDARDS: - ANSI T1.413 ISSUE 2 - ITU-T G.992.1 G.DMT - ITU-T G.992.2 (G.LITE) ■ SUPPORTS EITHER ATM (UTOPIA LEVEL 1 & 2) OR BITSTREAM INTERFACE

S1D13705

Abstract: lcd 2X20 epson EA 74HCT86 lcd 2X20 epson intel 945 motherboard schematic diagram B 722 P toshiba a10 motherboard VR4102 CON40A graphic lcd module 320x240 S1D13704
Contextual Info: S1D13705 Embedded Memory LCD Controller S1D13705 TECHNICAL MANUAL Document No. X27A-Q-001-04 Copyright 2001 Epson Research and Development, Inc. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

epson smd floppy

Abstract: ir3e203 4046 analog IC smd A9A smd diode g5 zener smd T4C S1D13706 S1D13A03 db-15 pin connector vga adapter X37A-A-001-xx
Contextual Info: S1D13A03 LCD/USB Companion Chip S1D13A03 TECHNICAL MANUAL Document Number: X36A-Q-001-01 Copyright 2001 Epson Research and Development, Inc. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

ProASIC3 Flash Family

Contextual Info: Revision 5 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches Extended Temperature AEC-Q100–Qualified Devices • Grade 2: –40°C to 105°C TA 115°C TJ

dual-port RAM

Abstract: AT17 AT17LV010-10DP AT40K MQFPF256 IO358
Contextual Info: Features • Functionally and Pin Compatible with the Atmel Commercial and Military AT40K Series • Ultra High Performance • • • • • • • • • • • • • • – System Speeds 60 MHz – Array Multipliers > 32 MHz – 18 ns Flexible SRAM

AES-128

Abstract: FG256 FG484 ARMv6
Contextual Info: Revision 8 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze

RT3PE3000

Abstract: RT3PE600L RT3PE3000L CCGA AES-128 PAC10 IO72NDB4V0
Contextual Info: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging

A3PE600

Contextual Info: v1.0 ProASIC3E Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits High Capacity • 600 k to 3 Million System Gates • 108 to 504 kbits of True Dual-Port SRAM • Up to 620 User I/Os Reprogrammable Flash Technology • • • •

LGA 478 SOCKET PIN LAYOUT

Abstract: RTAX2000
Contextual Info: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg

Contextual Info: ProASIC 3 Datasheet P ro du c t Br ie f 1 – ProASIC®3 Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits • • • • • 30 k to 1 Million System Gates Up to 144 kbits of True Dual-Port SRAM Up to 300 User I/Os Reprogrammable Flash Technology