INTRB Search Results

MPU85-347

Contextual Info: TOSHIBA CUC/UP . WE C • iai7 2 4 1 _ 0 Q ia0 D 1 7 ■ 1 ~ - 5 Z 'J 3 '0 3 TOSHIBA TMP82C255A/TMP82C265A CMOS PROGRAMMABLE PERIPHERAL INTERFACE TMP82C255AN-2 / TMP82C265AF-2 TMP82C255AN-10 / TMP82C265AF-10

er36 transformer

Contextual Info: S TANDARD PRO DUCT PM PMC-Sierra, inc. PM 7345 S/UNI-PDH ISSUE 5 SATURN User Network Interface forPD H PM7345 S/UNI- fTM PDH S/UNI-PDH S A T U R N U s e r N e t w o r k I n t e r f a c e for A T M P l e s i o c h r o n o u s Di gi t al H i e r a r c h y Pre lim ina ry

Burroughs Self-Scan

Abstract: 82c55al
Contextual Info: TUNDRA CA82C55A PROGRAMMABLE PERIPHERAL INTERFACE • Pin and functional compatibility with the industry standard 8255A • Supports 8086/8088 and 80186/188 m icroprocessors • Very high speed - 1 0 , 8 and 5 MHz zero wait state operation • Low power CMOS Implementation

DH10

Abstract: RV5C386A RV5C386A-E2 WH10
Contextual Info: 12345 Preliminary 9.Jun.99 I2C-Bus Real-Time Clock ICs with Voltage Monitoring Function RV5C386A 1. OUTLINE The RV5C386A is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL and SDA, and configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit

p8255a

Abstract: P8255AH P8255 PC317
Contextual Info: TO SH IBA TMP82C55A CMOS PROGRAM M ABLE PERIPHERAL INTERFACE TMP82C55AP-2/TMP82C55AM-2 TMP82C55AP-10/TMP82C55AM-10 1. GENERAL DESCRIPTION AND FEATURES T h e T M P 8 2 C 5 5 A h e r e in a f te r r e f e r re d to as P P I is a CM OS h ig h S p eed p rogram m able in p u t/o u tp u t in terface w ith th re e 8 -b it I/O ports. 24 I/O P o rts are divided

BL5373

Abstract: RS5C372
Contextual Info: 上海贝岭股份 上海贝岭股份有限公司 股份有限公司 BL5373 BL5373 用户手册 Shanghai Belling Co., Ltd. 低功耗实时时钟芯片 RTC 低功耗实时时钟芯片(RTC)BL5373 (RTC)BL5373 用 户 手 册 v 1. 0 ( 20102010-7-8) 上海贝岭股份有限公司

Contextual Info: f£ @ m & y w e l\ HÔNEYÜIELL/S S E C MSS1Ö7S DGGObbl S « H O N B 3ÛE J> Preliminary HTIU2000 TEST-BUS INTERFACE UNIT "P s z -^ -O S FEATURES M ID / TM C TL M lP TM CLK • Connects to VHSIC Backplane TM-bus - TM-bus Specification, Version 3.0 - TM-Bus Master or Slave Operation

TUNDRA

Abstract: Tundra Semiconductor Burroughs Self-Scan ci 4073 KD 2107 6 PIN BURROUGHS self scan
Contextual Info: TUNDRA CA82C55A PROGRAMMABLE PERIPHERAL INTERFACE • Pin and functional compatibility with the industry standard 8255A • Su pports 8086/8088 and 80186/188 microprocessors • Very high speed - 1 0 ,8 and 5 MHz zero wait state operation • Low power CMOS Implementation

82C55A

Abstract: 82C55A-2 intel 8255A 8255A-5 PC74
Contextual Info: 82C55A CHMOS PROGRAMMABLE PERIPHERAL INTERFACE Y Compatible with all Intel and Most Other Microprocessors Y High Speed ‘‘Zero Wait State’’ Operation with 8 MHz 8086 88 and 80186 188 Y 24 Programmable I O Pins Y Low Power CHMOS Y Completely TTL Compatible

BURROUGHS

Abstract: 80C86 80C88 82C55A 8406601QA CD82C55A-5 CP82C55A-5 CS82C55A-5 ID82C55A-5 IP82C55A-5
Contextual Info: 82C55A CMOS Programmable Peripheral Interface June 1998 Features Description • Pin Compatible with NMOS 8255A The Intersil 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process Scaled SAJI IV . It

TL 104 Z

Abstract: HSP50415 01650-B3E03 HC244 IEEE1284 RAPC712
Contextual Info: ZONE H S P 5 0 4 1 5 E U R L 1 PAG E PPlGE l: 2: R E U I S I O N S DESCRIPTION LTR DATE APPR. S C H E M f ì T I C S T IT L E HSP50415 PPlGE 3: CPLD PPlGE 4: POWER / SRPlM / M IS C DRAWN BY: STEYE HARRELL RELEASED BY: DATE: 11/22/99 TITLE: - UPDATED BY: intefsil

82C55A

Abstract: KK82C55
Contextual Info: TECHNICAL DATA KK82C55 CHMOS PROGRAMMABLE PERIPHERAL INTERFACE The Integral KK82C55AN is a high-performance, CHMOS version of the industry standard KK82C55AN general purpose programmable I/O device which is designed for use with all Intel and most other microprocessors. It provides 24 I/O pins which may be individually programmed in 2

82c56

Contextual Info: in te i 82C55A CHMOS PROGRAMMABLE PERIPHERAL INTERFACE Compatible with all Intel and Most O tter Microprocessor» • Control Word Read-Back Capability . Direct Bit S .t /R .« t Capability and 80186/188 « & " » £ £ £ ''• * “ ‘' ° Port ° UtpUtS

GL650USB

Abstract: MIC29302 usbhub genesys logic hub usb port diagram on motherboard MIC2526-8
Contextual Info: Genesys Logic, Inc. GL650USB USB 4 PORT HUB CONTROLLER DATA SHEET, Version 1.2 Aug. 18, 2000 Genesys Logic, Inc. 10F, No.11, Ln.3, Tsao Ti Wei, Shenkeng, Taipei, Taiwan Tel: 886-2-2664-6655 Fax: 886-2-2664-5757 http://www.genesyslogic.com GL650USB 4 PORT USB HUB CONTROLLER

Contextual Info: ICO RS5C373A Jan. 27 ’98 / / l2C-bus Serial Interface Real Time Clock with supply voltage detector 8pin SSOP • O U TLIN E T he R S5C 373A is a C M O S type real-tim e clock w hich is connected to the CPU via 2-w ire and capable of serial transm ission of clock and calendar data to the CPU. T he R S5C 373A can generate various periodic interrupt

Contextual Info: CHAPTER 1 OVERVIEW The ¿iPD98401A is a high-performance SAR chip that segments and reassembles ATM cells. This chip can interface with an ATM network when it is included in a workstation, computer, front-end processor, network hub, or router. The ¿iPD98401A conforms to the ATM Forum Recommendation, and provides the functions of the AAL-5

Contextual Info: CA82C55A CR L PROGRAMMABLE PERIPHERAL INTERFACE The CA82C55A Programmable Peripheral Interface is a high performance CMOS device offering pin for pin functional compatibility with the industry standard 8255A. it includes 24 I/O pins which may be individually

EA044

Contextual Info: I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC RS5C372A NO. EA-044-0310 OUTLINE The RS5C372A is a CMOS type real-time clock which is connected to the CPU via 2-wires and capable of serial transmission of clock and calendar data to the CPU. The RS5C372A can generate various periodic interrupt clock pulses lasting for long period one month , and

simatic s5 siemens cable pc a plc

Abstract: INTERBUS SIMATIC S5 interface simatic s5 error bus fault siemens cpu 115u siemens s5 S5-115U SIMATIC S5 communication cable S5-150U Siemens SIMATIC S5 CPU manual Siemens SIMATIC S5 siemens simatic s5 S5-115U ps
Contextual Info: IBS S5 DSC/I-T Data Sheet INTERBUS Controller Board for Siemens SIMATIC S5 PLCs Data Sheet Revision B 09/1997 Product Description INTERBUS Generation 4 controller board for SIMATIC® S5 115U to 155U, 130WB and 150S PLCs. Features - INTERBUS protocol DIN E 19258

electric rice cooker diagram

Abstract: diagram rice cooker
Contextual Info: I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION NO.EA-080-0208 RV5C387A OUTLINE The RV5C387A is a CMOS real-time clock IC connected to the CPU by two signal, SCL and SDA, and configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is configured to

Contextual Info: I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION NO.EA-079-0208 RV5C386A OUTLINE The RV5C386A is a CMOS real-time clock IC connected to the CPU by two signal lines, SCL and SDA, and configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is

xbox one

Abstract: xbox controller
Contextual Info: 4 Genesys Logic, Inc. GL653 USB 2.0 2-Port Hub Compound Device Controller Datasheet Revision 1.20 Dec. 27, 2002 GL653 USB 2.0 2-Port Hub Compound Device Controller Copyright: Copyright 2003 Genesys Logic Incorporated. All rights reserved. No part of the materials may be

TCA 3089

Abstract: tmp82c55* toshiba westinghouse co 11 tcc TMP82C255A TMP82C255AN TMP82C255AN-2 TMP82C265A TMP82C265AF TMP82C255AN-10 TMP82C55AX2
Contextual Info: TOSHIBA TMP82C255A/TMP82C265A CMOS PROGRAMMABLE PERIPHERAL INTERFACE TM P82C 255AN -2 /TM P 82C 265A F -2 TM P 82C 255A N -10 / TM P82C 265AF-10 1. GENERAL DESCRIPTION A N D FEATURES The TMP82C255A/TMP82C265A is a CMOS high speed programmable input/output

TMP8255AP-5

Abstract: TMP8255AP5 TMP8255A
Contextual Info: TO SH IBA TMP8255A PRO GRAM M ABLE PERIPHERAL INTERFACE TMP8255AP-5 1. GENERAL DESCRIPTION AND FEATURES The TMP8255A hereinafter referred to as PPI is a high Speed program m able input/output interface w ith three 8-bit I/O ports. 24 I/O ports are divided into two