INTEL DG 31 Search Results

DFAR252

Abstract: intel dg 31 compaq cq 40
Contextual Info: Intel Virtual Interface VI Architecture Conformance Suite User’s Guide Preliminary Version V0.5 December 14, 1998  1998 Intel Corporation. DISCLAIMERS THIS INTEL VIRTUAL INTERFACE ARCHITECTURE CONFORMANCE SUITE USER’S GUIDE (‘USER’S GUIDE’) IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY

DFAR252

Abstract: intel dg
Contextual Info: Intel Virtual Interface VI Architecture Conformance Suite User’s Guide Preliminary Version V0.4 October 12, 1998  1998 Intel Corporation. DISCLAIMERS THIS INTEL VIRTUAL INTERFACE ARCHITECTURE CONFORMANCE SUITE USER’S GUIDE (‘USER’S GUIDE’) IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY

W83-310dg

Abstract: w83310ds W83310DG 310DS W83-310ds 310DG intel dg
Contextual Info: Winbond Bus Termination Regulator W83310DS/DG W83310DS Datasheet Revision History Pages 1 Dates Version Version on Web May/03 0.5 N.A. All versions before 0.5 are only for internal use. Main Contents 2 1 May/03 0.51 N.A. Typo corrected. 3 5 May/03 0.60 N.A.

stc 8080A+упътване

Contextual Info: 8080A/8080A-1/8080A-2 8-BIT N-CHANNEL MICROPROCESSOR • TTL Drive Capability ■ 2 jus -1:1.3 jus, -2:1.5 jas Instruction Cycle ■ Powerful Problem Solving Instruction Set ■ Decimal, Binary, and Double Precision Arithmetic ■ Ability to Provide Priority Vectored

YM71

Contextual Info: HYM71V16655AT6 16Mx64, 8Mx16 based, PC100 DESCRIPTION The Hynix HYM71V16655AT6 Series are 16Mx64bits Synchronous DRAM Modules. The modules are composed of eight 8Mx16bits CMOS Synchronous DRAMs In 400mil 54pln TSOP-II package, one 2Kbit EEPROM in Spin TSSOP package on a 168pin glass-epoxy

Contextual Info: HYM72V32M636AT6 32Mx64, 16Mx16 based, PC133 DESCRIPTION The H Y M 72V 32M 636A T 6 Series are high speed 3.3-Volt Synchronous D RA M Modules composed of four 16M x16 bit Synchronous DRAMs in 54-pin TS O P II and 8-pln TS S O P 2K bit EE P R O M on a 144-pin Zig Zag Dual pin glass-epoxy

Contextual Info: SAB 82532 Preliminary 5 Electrical Specifications 5.1 Absolute Maximum Ratings Ambient temperature under bias Storage temperature Voltage on any pin with respect to ground to to to -65 -0.4 70 125 VDD + 0 .4 Note: Stresses above those listed here may cause permanent damage to the device.

Contextual Info: CYPRESS PRELIMINARY CYM74B430 CYM74P430/31 CYM74S430/31 Intel 82340FX PCIset Level II Cache Module Family Features • Pin-compatible secondary cache m odule fam ily that ad­ heres to the Intel COAST 1.1 specification • Asynchronous CYM74B430 , synchronous pipelined

Contextual Info: in te i 8085AH/8085AH-2/8085AH-1 8-BIT HMOS MICROPROCESSORS Single + 5V Power Supply with 10% Voltage Margins 3 MHz, 5 MHz and 6 MHz Selections Available 20% Lower Power Consumption than 8085A for 3 MHz and 5 MHz 1.3 jus Instruction Cycle 8085AH ; 0.8 fis (8085AH-2); 0.67 >xs (8085AH-1)

8085 mnemonic opcode

Abstract: B08S I8085ah CNC CIRCUIT DIAGRAM 61jl 8085 timing diagram sui 90 H
Contextual Info: in te i 8085AH/8085AH-2/8085AH-1 8-BIT HMOS MICROPROCESSORS Single + 5V Power Supply with 10% Voltage Margins 3 MHz, 5 MHz and 6 MHz Selections Available 20% Lower Power Consumption than 8085A for 3 MHz and 5 MHz 1.3 jus Instruction Cycle 8085AH ; 0.8 jas (8085AH-2); 0.67 ¡xs (8085AH-1)

8080a intel microprocessor pin diagram

Abstract: intel 8080A instruction set 8080A intel 8080a Intel 8080 8080A CPU 8080A-1 stc 8080 h stc 8080 stc 8080A
Contextual Info: intei 8080A/8080A-1 /8080A-2 8-BIT N-CHANNEL MICROPROCESSOR TTL Drive Capability Decimal, Binary, and Double Precision A rithm etic 2 ¡Xs —1:1.3 u s , —2:1.5 fis Instruction Cycle Ability to Provide Priority V ectored Interrupts Powerful Problem Solving Instruction

D2374

Abstract: UMC491 Intel chipset for 486 EU5T 74FCT373 LA17 burndy 112 pin burndy 10 pin GND92 burndy connector
Contextual Info: CYM9236 CYM9237 PRELIMINARY J r CYPRESS 128K/256K Cache Module for the UMC491 Chip Set Features • TTL-compatible inputs/outputs • 128 K-byte CYM9236 or 256 K-byte (CYM9237) secondary cache module organized as 32K by 32 or 64K by 32 • Ideal for Intel “ 486-based systems

M8254

Contextual Info: in t e i M8254 PROGRAMMABLE INTERVAL TIMER Military • Compatible with M8080A, M8085AH, M6086, M8088 and M80186 ■ Handles Inputs from DC to 8 MHz ■ Six Programmable Counter Modes ■ Status Read-Back Command ■ Available in 24-Pin Cerdip and 28-Pad LCC Packages

Contextual Info: CYM74C430 CYPRESS Intel 82430FX PCIset Level II Cache Module Features Functional Description • This secondary cache module is designed for Intel P54C sys­ tem s with the 82430FX Triton chip set. CYM74C430 is an asynchronous 256-Kbyte cache module that provides a low-cost,

112 pin cache

Contextual Info: C Y M 7414 —^ r # C Y PR ESS CYM7425 = ^ ^ = = = ^ ^ ^ ^ eee = = 128K/256K Cache Module for the Intel 82420EX PCIset Features • 128 Kbyte CYM7424 or 256 Kbyte (CYM7425) secondary cache module organized as 32K by 32 or 64K by 32 • Ideal for Intel 486-based systems with

OC02

Abstract: intel dg 41 rq ram circuit
Contextual Info: HYM72V16M636T6 16Mx64, 16Mx16 based, PC133 DESCRIPTION The HY M 72V 16M 636T6 S e rie s a re 1 6 M x 6 4 b its S ynchronous D R A M M od u le s . T h e m odules a re com posed o f four 1 6M x1 6b its C M O S S ynchronous D R A M s ¡n 4 0 0 m il 54p in T S O P -II p a ck a g e, o n e 2K bit E E P R O M in Spin T S S O P p a c k a g e on a 1 68pin g las s -e p o xy

Contextual Info: C Ÿ M 9 1 30 . — ^ ^ PRELIMINARY '= CYPRESS — 82420 PCIset-Compatible Level II Cache Modules Features • TTL-compatible inputs/outputs • 128K-byte CYM9230 or 256K-byte (CYM9231) cache moducle organized as 32K by 32 or 64K by 32 • Tag width of 9 bits plus valid bit

8254

Abstract: intel 8205 8205 microprocessor 8254 counter intel 8254 block diagram of intel 8254 chip intel DOC timer 8254 circuit dl 8205 bcd to hex decimal
Contextual Info: 8254 PROGRAMMABLE INTERVAL TIMER Compatible with All Intel and Most Other Microprocessors Six Programmable Counter Modes Three Independent 16-Bit Counters Handles Inputs from DC to 10 MHz — 5 MHz 8254-5 — 8 MHz 8254 — 10 MHz 8254-2 Binary or BCD Counting

ITE IT8502E

Abstract: IT8502E R5U230 RT8206A SC8825 IT8301E 9LRS3197 D4802 ICS9LRS3197 MAX17028
Contextual Info: 5 4 SYSTEM PAGE REF. Content PAGE D C B 1 2 3 4 5 6 7 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 36 37 40 43 44 45 46 47 48 50 51 52 53 56 57 58 60 61 64 65 66 67 70 Block Diagram System Setting CPU 1 _DMI,PEG,FDI,CLK,MISC CPU(2)_DDR3 CPU(3)_CFG,RSVD,GND

3731 61

Abstract: Intel 82430 H30P
Contextual Info: 512KB SECONDARY CACHE MODULES FOR THE INTEL PENTIUM CPU AND INTEL 82430 FAMILY CORE LOGIC PCISETS Integrated Device Technology, Inc. PRELIMINARY IDT7MPV6293 IDT7MPV6294 FEATURES DESCRIPTION • For Intel Pentium C PU-based system s using the Intel 82430 fam ily core logic PCIsets

Contextual Info: M2F1G64CBH4B5P/ M2F1G64CBH4B9P M2F X 2G64CB88B7N / M2F(X)2G64CB88BHN M2F(X)4G64CB8HB5N / M2F(X)4G64CB8HB9N 1GB: 128M x 64 / 2GB: 256M x 64 / 4GB: 512M x 64 PC3-8500 / PC3-10600 / PC3-12800 Unbuffered DDR3 SDRAM DIMM Based on DDR3-1066/1333 128Mx16 (1GB) and DDR3-1066/1333/1600 256Mx8 (2GB/4GB) SDRAM B-Die

Contextual Info: inU PR EL IM IN AR Y V A L U E S E R I E S 100 F L ASH M E M O R Y C A R D 2-, 4-, 8- and 16- M E G A B Y T E S ÌM C 0 0 2 F L S C , ÌM C 0 0 4 F L S C , ÌM C 0 0 8 F L S C , ÌM C 0 1 6 F L S C L o w - C o s t L i n e a r Fl ash Ca r d Si ngl e Suppl y: S Volt Operati on

132d60

Abstract: D1349
Contextual Info: PRELIMINARY IDT7MPV6271 256KB PIPELINED BURST SECONDARY CACHE MODULE FOR THE INTEL PENTIUM CPU BASED MOBILE PLATFORMS FEATURES for use with mobile PC s based on the Intel 3 .3 V Pentium™ C P U . Th e ID T7M P V6271 use ID T ’s 7 1 V 4 3 2 3 2 K x 3 2 pipelined

Intel 8080 instruction set

Abstract: intel 8080A instruction set SPHL intel 8080
Contextual Info: 8080A/8080A-1/8080A-2 8-BIT N-CHANNEL MICROPROCESSOR • TTL Drive Capability ■ 2 jxs -1:1.3 ills, -2:1.5 fis Instruction Cycle ■ Powerful Problem Solving Instruction Set ■ Decimal, Binary, and Double Precision Arithmetic ■ Ability to Provide Priority Vectored