INTEL DG 31 Search Results

DFAR252

Abstract: intel dg
Contextual Info: Intel Virtual Interface VI Architecture Conformance Suite User’s Guide Preliminary Version V0.4 October 12, 1998  1998 Intel Corporation. DISCLAIMERS THIS INTEL VIRTUAL INTERFACE ARCHITECTURE CONFORMANCE SUITE USER’S GUIDE (‘USER’S GUIDE’) IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY

stc 8080A+упътване

Contextual Info: 8080A/8080A-1/8080A-2 8-BIT N-CHANNEL MICROPROCESSOR • TTL Drive Capability ■ 2 jus -1:1.3 jus, -2:1.5 jas Instruction Cycle ■ Powerful Problem Solving Instruction Set ■ Decimal, Binary, and Double Precision Arithmetic ■ Ability to Provide Priority Vectored

Contextual Info: SAB 82532 Preliminary 5 Electrical Specifications 5.1 Absolute Maximum Ratings Ambient temperature under bias Storage temperature Voltage on any pin with respect to ground to to to -65 -0.4 70 125 VDD + 0 .4 Note: Stresses above those listed here may cause permanent damage to the device.

Contextual Info: CYPRESS PRELIMINARY CYM74B430 CYM74P430/31 CYM74S430/31 Intel 82340FX PCIset Level II Cache Module Family Features • Pin-compatible secondary cache m odule fam ily that ad­ heres to the Intel COAST 1.1 specification • Asynchronous CYM74B430 , synchronous pipelined

Contextual Info: in te i 8085AH/8085AH-2/8085AH-1 8-BIT HMOS MICROPROCESSORS Single + 5V Power Supply with 10% Voltage Margins 3 MHz, 5 MHz and 6 MHz Selections Available 20% Lower Power Consumption than 8085A for 3 MHz and 5 MHz 1.3 jus Instruction Cycle 8085AH ; 0.8 fis (8085AH-2); 0.67 >xs (8085AH-1)

D2374

Abstract: UMC491 Intel chipset for 486 EU5T 74FCT373 LA17 burndy 112 pin burndy 10 pin GND92 burndy connector
Contextual Info: CYM9236 CYM9237 PRELIMINARY J r CYPRESS 128K/256K Cache Module for the UMC491 Chip Set Features • TTL-compatible inputs/outputs • 128 K-byte CYM9236 or 256 K-byte (CYM9237) secondary cache module organized as 32K by 32 or 64K by 32 • Ideal for Intel “ 486-based systems

M8254

Contextual Info: in t e i M8254 PROGRAMMABLE INTERVAL TIMER Military • Compatible with M8080A, M8085AH, M6086, M8088 and M80186 ■ Handles Inputs from DC to 8 MHz ■ Six Programmable Counter Modes ■ Status Read-Back Command ■ Available in 24-Pin Cerdip and 28-Pad LCC Packages

Contextual Info: CYM74C430 CYPRESS Intel 82430FX PCIset Level II Cache Module Features Functional Description • This secondary cache module is designed for Intel P54C sys­ tem s with the 82430FX Triton chip set. CYM74C430 is an asynchronous 256-Kbyte cache module that provides a low-cost,

29062

Contextual Info: PRODUCT PREVIEW SERIES 200 FLASH MEMORY MINIATURE CARD 4, 8,16 MBYTES ÌFM004G, ÌFM008G and ÌFM016G • Low-Cost Linear Flash Card — Intel StrataFlash Memory Flash Technology ■ Fast Read Performance — 150 ns Max Access Time ■ High-Performance Writes

112 pin cache

Contextual Info: C Y M 7414 —^ r # C Y PR ESS CYM7425 = ^ ^ = = = ^ ^ ^ ^ eee = = 128K/256K Cache Module for the Intel 82420EX PCIset Features • 128 Kbyte CYM7424 or 256 Kbyte (CYM7425) secondary cache module organized as 32K by 32 or 64K by 32 • Ideal for Intel 486-based systems with

3731 61

Abstract: Intel 82430 H30P
Contextual Info: 512KB SECONDARY CACHE MODULES FOR THE INTEL PENTIUM CPU AND INTEL 82430 FAMILY CORE LOGIC PCISETS Integrated Device Technology, Inc. PRELIMINARY IDT7MPV6293 IDT7MPV6294 FEATURES DESCRIPTION • For Intel Pentium C PU-based system s using the Intel 82430 fam ily core logic PCIsets

Contextual Info: M2F1G64CBH4B5P/ M2F1G64CBH4B9P M2F X 2G64CB88B7N / M2F(X)2G64CB88BHN M2F(X)4G64CB8HB5N / M2F(X)4G64CB8HB9N 1GB: 128M x 64 / 2GB: 256M x 64 / 4GB: 512M x 64 PC3-8500 / PC3-10600 / PC3-12800 Unbuffered DDR3 SDRAM DIMM Based on DDR3-1066/1333 128Mx16 (1GB) and DDR3-1066/1333/1600 256Mx8 (2GB/4GB) SDRAM B-Die

Contextual Info: inU PR EL IM IN AR Y V A L U E S E R I E S 100 F L ASH M E M O R Y C A R D 2-, 4-, 8- and 16- M E G A B Y T E S ÌM C 0 0 2 F L S C , ÌM C 0 0 4 F L S C , ÌM C 0 0 8 F L S C , ÌM C 0 1 6 F L S C L o w - C o s t L i n e a r Fl ash Ca r d Si ngl e Suppl y: S Volt Operati on

132d60

Abstract: D1349
Contextual Info: PRELIMINARY IDT7MPV6271 256KB PIPELINED BURST SECONDARY CACHE MODULE FOR THE INTEL PENTIUM CPU BASED MOBILE PLATFORMS FEATURES for use with mobile PC s based on the Intel 3 .3 V Pentium™ C P U . Th e ID T7M P V6271 use ID T ’s 7 1 V 4 3 2 3 2 K x 3 2 pipelined

Contextual Info: AD VA NC E INFORM ATIO N SE RI ES 100 FLASH M E M O R Y MINIATURE CARD ÌFM 002A , ÌFM 004A • L o w - C o s t Linear Flash Card ■ M i n i a t u r e C a rd S p e c i f i c a t i o n C o m p l i a n t ■ Single Suppl y Smar t Vol t age Operati on — 5V or 3. 3V Read/ Wri t e

FADES1100

Abstract: FADES1100DF FADES1100CF FADES1100EF fades1100af 278088 0x80000A DE-S1100-AA DE-S1100-CA FADES11
Contextual Info: Intel StrongARM® SA-1100 Microprocessor Specification Update February 2000 Notice: The SA-1100 may contain design defects or errors known as errata. Characterized errata that may cause the SA-1100’s behavior to deviate from published specifications are documented

Contextual Info: 256KB/512KB PIPELINED BURST FUSION MEMORY SECONDARY CACHE MODULES Integrated Device Technology, Inc. FEATURES • For Intel Pentium CPU-based systems • Low-cost, low-profile card edge module with 160 leads • Modules are compliant to the Intel Cache-on-a-stick

Intel 8243

Abstract: UPI-41
Contextual Info: INTEL CORP UP/PRPHLS 3iE D • 4 asb 1 7 s o a a n a ? int@l 3 ■ T - Ï2 - Z 2 - /S 8741A UNIVERSAL PERIPHERAL INTERFACE 8-BIT MICROCOMPUTER ■ 8-Bit CPU plus ROM, RAM, I/O , Timer and Clock in a Single Package Fully Compatible with All Microprocessor Families

Contextual Info: CYPRESS CYM74BP54 CYM74P54/55 CYM74SP54/55 PRELIMINARY Features • Pin-compatible secondary cache m odule fam ily • Asynchronous CYM74BP54 , synchronous pipelined (CYM74P54, CYM74P55), or synchronous (CYM74SP54, CYM74SP55) configurations with pres­ ence and configuration detect pins

IDT7MPV6229

Contextual Info: 256KB AND 512KB SECONDARY CACHE MODULES FOR THE INTEL PENTIUM CPU Integrated Device Technology, Inc. PRELIMINARY IDT7MPV6227 IDT7MPV6228 IDT7MPV6229 FEATURES DESCRIPTION • For Intel Pentium CPU-based systems The IDT7MPV6227/28/29 modules belong to a family of

AS085

Contextual Info: i r r t j , 8085AH/8085AH-2/8085AH-1 8-BIT HMOS MICROPROCESSORS • Single +SV Power Supply with 10% Voltage Margins ■ 3 MHz, 5 MHz and 6 MHz Selections Available ■ 20% Lower Power Consumption than 8085A for 3 MHz and 5 MHz ■ 1.3 ju.s Instruction Cycle 8085AH ; 0.8

82c56

Contextual Info: in te i 82C55A CHMOS PROGRAMMABLE PERIPHERAL INTERFACE Compatible with all Intel and Most O tter Microprocessor» • Control Word Read-Back Capability . Direct Bit S .t /R .« t Capability and 80186/188 « & " » £ £ £ ''• * “ ‘' ° Port ° UtpUtS

A5 GNC

Abstract: A1W 73 c877 A64A A1 GNC cym74sp55pm 82430NX CYM74BP54 CYM74P54 0/mosfet A5 GNC
Contextual Info: CYM74BP54 CYM74P54/55 CYM74SP54/55 æ r~ ^ S T •= • > y PRELIMINARY n u n n rn r L- Ï i n L o b = Intel 82430NX Chipset Level II Cache Module Family Features • Pin-compatible secondary cache module fam ily • Asynchronous CYM74BP54 , synchronous pipelined

8255AC

Abstract: ic 8255 S255A 8255A PPI 8255A Control word 8255 PPI intel 8255a ppi block diagram Peripheral interface 8255 8255 intell 8255A-5
Contextual Info: in te i PROGRAMMABLE PERIPHERAL INTERFACE MCS-85 Compatible 8255A-5 • Direct Bit Set/Reset Capability Easing Control Application Interface 24 Programmable I/O Pins Completely TTL Compatible ■ 40-Pin Dual In-Line Package Fully Compatible with lintel Micro­