25FLTFC Search Results

7C188

Abstract: CY7C188
Contextual Info: bSE D CYPRESS SEMICONDUCTOR — * • Highspeed — 12 ns • Automatic power-down when deselected • Low active power — 965 m W • Low standby power — 220 m W OOOWi 31b • CYP CY7C188 32K x 9 Static RAM PRELIMINARY CYPRESS SEMICONDUCTOR Features 250^2

CY7C106A

Contextual Info: ÇY7C106A PRELIMINARY 256K x 4 Static RAM Features Functional Description • High speed The CY7C106A is a high-performance CM OS static RAM organized as 262,144 words by 4 bits. Easy memory expansion is provided by an active LO W chip enable C E , an active LOW output enable (O E ),

LA 6508

Contextual Info: IC d e s ig n s Graphics Frequency Synthesizers ICD2063 Programmable Graphics Clock Generator 3.3V/5V Single-Chip Dual Programmable Oscillator Handles All Frequency Requirements of Popular Graphics Chip Sets 2nd Generation Dual Oscilla­ tor Graphics Clock Generator

Contextual Info: C Ÿ M 9 1 30 . — ^ ^ PRELIMINARY '= CYPRESS — 82420 PCIset-Compatible Level II Cache Modules Features • TTL-compatible inputs/outputs • 128K-byte CYM9230 or 256K-byte (CYM9231) cache moducle organized as 32K by 32 or 64K by 32 • Tag width of 9 bits plus valid bit

LA 78141

Abstract: IC LA 78141 la 78141 equivalent TTL LA 78141 ci LA 78141 CY7B131 CY7B141 b1316 CY7B131-20JI
Contextual Info: CY7B131 CY7B141 i f C YPRESS IK x 8 Dual-Port Static RAM Features Functional Description • 0.8-micron BiCMOS for high performance • Automatic power-down • TTL compatible • Capable of withstanding greater than 2001V electrostatic discharge • Fully asynchronous operation

CY7C383A-2JC

Abstract: CY7C383A-2JI CY7C384A-OAC CLK503
Contextual Info: CY7C383A CY7C384A s# CYPRESS UltraLogic Very High Speed 2K Gate CMOS FPGA — Waveform simulation with back annotated net delays — PC and workstation platforms Extensive 3rd party tool support — See Development Systems section Robust routing resources