INMOS T805 Search Results

Contextual Info: 2 1.1 Introduction The SGS-THOMSON Microelectronics Group is a major supplier of a wide range of semi-conductor de­ vices and commands leading market positions in many product areas. The acquisition of INMOS has strengthened SGS-THOMSON’s portfolio. INMOS, based In the UK, operates in the same way as all other

D4205

Abstract: inmos m212 disk processor B4043 D42050 T225 D505A IMS B404 T414 D705B ims-m212
Contextual Info: Chapter 2 9 □ mos IMS D7205 IMS D6205 IMS D5205 IMS D4205 0 C C 3 IT I 2 Toolset Product Information occam cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Occam compiler for INMOS transputer family of processors

Inmos t805

Abstract: T805 inmos inmos transputer B427 TRAM ims pcb
Contextual Info: IMS B427 8Mbyte Size 2 TRAM Reset Analyse NotError Link0 8Mbytes DRAM IMS T805 Link1 Link2 Link3 Terminated links Subsystem PAL SS Reset SS Analyse notSS Error FEATURES DESCRIPTION H 25MHz IMS T805 Transputer The IMS B427 is a compact size 2 TRAM offering

B433

Abstract: motherboard imst805 INMOS
Contextual Info: w m S C S " T H O M S O N im ^ R 4 ^ Size 4 16Mbyte HTRAM FEATURES DESCRIPTION • IMS T805 25 MHz Transputer The IMS B433 uses the IMS T805 25MHz trans­ puter. The 16 Mbytes of single w ait-state DRAM is sufficient to run large applications. Also pro­ vided is 64 Kbytes of fast SRAM 3 cycle , so any

S507

Abstract: IMSB008 IMS B300
Contextual Info: Chapter 14 131 IMS S707 IMS S607 IMS S507 Network support software ánimos* Product Information KEY FEATURES • Transparent access to transputer networks over Ethernet • Management of multiple transputer networks In a multi-user environment • Support for mixed machines on host network

T800 transputer

Abstract: QIC-24
Contextual Info: Chapter 5 □ cmmos 43 IMS D7216 IMS D6216 IMS D5216 IMS D4216 ANSI FORTRAN 77 Toolset Advance Information ANSI FORTRAN 77 cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI FORTRAN 77 ANSI X3.9 -1978 •

inmos m212 disk processor

Abstract: T222 inmos T414 D5214 IMSB404 inmos transputer reference manual ims-m212 Transputer T414 nec pc9801
Contextual Info: Chapter 3 □ I mos* 23 IMS D7214 IMS D6214 IMS D5214 IMS D4214 ANSI C Toolset Product Information ANSI C cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI C compiler X3.159-1989 • Validated against Plum Hall validation suite

inmos T400

Abstract: T400-T20S AD1230 T4-0065 800-00030 T400-J20S AD123 inmos transputer reference manual imst400
Contextual Info: iZ J S G S -T H O M S O N ^ 7 # . » » I U I © « » IM S T 4 0 0 ® 32 bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425

T805E

Contextual Info: w# SGS-THOMSON IMS T805E 32-bit floating-point transputer - Extended temperature FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MIPS peak instruction rate ■ 2.8 Mflops (peak) instruction rate ■ Pin compatible with IMS T800 ■

T425

Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
Contextual Info: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal

Contextual Info: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support

CQ 2AF1

Abstract: IMST425 IMS T400 Inmos T222
Contextual Info: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal

inmos T414

Abstract: inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414
Contextual Info: IMS T400 Low cost 32-bit transputer FEATURES H 32 bit architecture H 50 ns internal cycle time H 20 MHz only H 20 MIPS peak instruction rate H 10 MIPS sustained instruction rate H Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 H 2 Kbytes on-chip static RAM

t425

Abstract: SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425
Contextual Info: w # S G S -T H O M S O N IM < 5 , kT # D ïiin g M iiiL iK g T Â E g n e i ,M & _ T 4 2 5 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMST400 and IMS T414

IMST414

Abstract: IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer
Contextual Info: SGS-THOMSON IM S T 4 0 0 Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425

T400 600

Abstract: IMS T414
Contextual Info: Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 ■ 2 Kbytes on-chip static RAM

Contextual Info: S G S -1 H 0 M S 0 N « t i m i I g ï M a M Ê IMS T400 i Low cost 32-bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425

Inmos t805

Abstract: IMS T805-F20E T425 T800 IMST800 21-F5 REAL32
Contextual Info: IMS T805E 32-bit floating-point transputer – Extended temperature FEATURES APPLICATIONS Scientific and mathematical applications High speed multi processor systems High performance graphics processing – HUD/HDD displays Supercomputers Workstations and workstation clusters

Inmos t805

Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
Contextual Info: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

ic t805

Abstract: IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11
Contextual Info: SGS-THOMSON IMS T805E •HI 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate 2.8 Mflops (peak) instruction rate Pin compatible with IMS T800 Floating Point Unit Debugging support

74F04

Abstract: 74F74 800E 801C T222 T225 T225E Inmos T222
Contextual Info: IMS T225 16-bit transputer FEATURES 16 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 60 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory

T222 transputer

Abstract: 74F74 800E 801C T222 T225 IMST222 T225E
Contextual Info: IMS T225E 16-bit transputer – Extended temperature FEATURES 16 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate Debugging support 4 Kbytes on-chip static RAM 40 Mbytes/sec sustained data rate to internal memory 64 Kbytes directly addressable external memory

74F74

Abstract: inmos transputer T225 transputer Inmos t805 FP 8022 74F04 800E 801C T222 T225
Contextual Info: IMS T225 16-bit transputer FEATURES H 16 bit architecture H 33 ns internal cycle time H 30 MIPS peak instruction rate H Debugging support H 4 Kbytes on-chip static RAM H 60 Mbytes/sec sustained data rate to internal memory H 64 Kbytes directly addressable external memory

Contextual Info: S G S -T H O M S O N S IMS T225E s L lP T M lM i 16-bit transputer - Extended temperature FEATURES H 16 bit architecture H 50 ns internal cycle time H 20 MIPS peak instruction rate H Debugging support H 4 Kbytes on-chip static RAM H 40 Mbytes/sec sustained data rate to internal