IMS T800 Search Results

T425

Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
Contextual Info: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal

Inmos t805

Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
Contextual Info: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

inmos T414

Abstract: inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414
Contextual Info: IMS T400 Low cost 32-bit transputer FEATURES H 32 bit architecture H 50 ns internal cycle time H 20 MHz only H 20 MIPS peak instruction rate H 10 MIPS sustained instruction rate H Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 H 2 Kbytes on-chip static RAM

Contextual Info: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support

AD T805

Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
Contextual Info: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

specifications of tdr

Abstract: Inmos t805 IMS processor
Contextual Info: SGS-THOMSON IMS T805 ’H E S m M M 32-bit floating-point transputer FEATURES • ■ ■ 32 bit architecture 40 ns internal cycle tim e 25 M IPS peak instruction rate ■ 3.6 M flops (peak) instruction rate ■ Pin co m patible w ith IMS T800, IMS T425, IMS T400

Contextual Info: S G S -1 H 0 M S 0 N « t i m i I g ï M a M Ê IMS T400 i Low cost 32-bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425

inmos T414

Abstract: IMS T414 T414 inmos transputer T425 IMSB401 T800 transputer inmos transputer IMSB008 T800 IMST414
Contextual Info: Chapter 17 149 IMS B401 TRAM 32-bit transputer 32 Kbytes Size 1 □ m os Engineering Data Reset Analyse-NotError ^ o /j- IMS T800 LinkO -«- h * or Linkl - - H , IMS T425 32 Kbytes SRAM Link2 Link3. Terminated links FEATURES GENERAL DESCRIPTION

D4205

Abstract: inmos m212 disk processor B4043 D42050 T225 D505A IMS B404 T414 D705B ims-m212
Contextual Info: Chapter 2 9 □ mos IMS D7205 IMS D6205 IMS D5205 IMS D4205 0 C C 3 IT I 2 Toolset Product Information occam cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Occam compiler for INMOS transputer family of processors

inmos m212 disk processor

Abstract: T222 inmos T414 D5214 IMSB404 inmos transputer reference manual ims-m212 Transputer T414 nec pc9801
Contextual Info: Chapter 3 □ I mos* 23 IMS D7214 IMS D6214 IMS D5214 IMS D4214 ANSI C Toolset Product Information ANSI C cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI C compiler X3.159-1989 • Validated against Plum Hall validation suite

inmos transputer T425

Abstract: T800 B411-8 TRAM IMST800 b008 IMS T800 IMSB008 ims pcb imsb411
Contextual Info: Chapter 20 167 IMS B411 TRAM 3 2 -b it transputer 1 Mbyte Size 1 oímos Engineering Data Reset • Analyse NotError - — < IMS T800 or 1 Mbyte LinkO - >| Linkl IMS T425 DRAM -I Link2 - -Link3 J -Terminated links FEATURES GENERAL DESCRIPTION

T800 transputer

Abstract: QIC-24
Contextual Info: Chapter 5 □ cmmos 43 IMS D7216 IMS D6216 IMS D5216 IMS D4216 ANSI FORTRAN 77 Toolset Advance Information ANSI FORTRAN 77 cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI FORTRAN 77 ANSI X3.9 -1978 •

IMST414

Abstract: IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer
Contextual Info: SGS-THOMSON IM S T 4 0 0 Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425

T800 transputer

Abstract: T800 INMOS T800 2512 package resistor dimensions details Inmos inmos static ram
Contextual Info: Chapter 25 203 IMS B427 mos 32-bit transputer 8 Mbytes Size 2 TRAM Engineering Data FEATURES GENERAL DESCRIPTION • 25MHz IMS T800 Transputer • 8 Mbyte of one wait-state DRAM 160 ns memory cycle time The IMS B427 Is a compact size 2 TRAM offering 8Mbytes of 4-cycle DRAM and subsystem

ic t805

Abstract: IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11
Contextual Info: SGS-THOMSON IMS T805E •HI 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate 2.8 Mflops (peak) instruction rate Pin compatible with IMS T800 Floating Point Unit Debugging support

ZR34325

Abstract: Inmos T800 FLOATING POINT Co Processor f32c INMOS T800
Contextual Info: Chapter 31 255 IMS B420 Vector processing TRAM Size 4 rnnos Engineering Data FEATURES GENERAL DESCRIPTION • IMS T800 -25 or T800 -20 floating point trans­ puter • High performance vector/signal processing co-processor ZR34325 —e.g. 1K complex FFT < 2ms for 25MHz co­

ZR34325

Contextual Info: 69 Chapter 8 IMS FOOOB VecTRAM library □ Product Information A software support package for the IMS B420 Vector Processing TRAM KEY FEATURES • Dramatically speeds up parallel applications and increases system performance involving vector/signal processing compulation.

IMSB417

Abstract: T800 inmos static ram
Contextual Info: Chapter 23 189 IMS B417 TRAM 32-bit transputer 4 Mbytes Size 4 m os Engineering Data Reset Analyse NotError Terminated links Subsystem. PAL FEATURES IMS T800 25 MHz Transputer 64 Kbytes of zero wait-state SRAM 4 Mbytes of single wait-state DRAM Subsystem controller circuitry

IMSC100

Abstract: IMS T800 CPU STI 7110 transputer LONGSUM LED T9000 u44X IMST9000 Edd 44 inmos transputer
Contextual Info: 55 IMS T9000 transputer I . tre y mos Preliminary Information FEATURES Instruction set com patible with the IMS T805 Pipelined superscalar m icro-architecture W orkspace cache Programmable m em ory interface 4 Gbyte physical address space 16 Kbyte instruction and data cache

imsb426

Abstract: b426 T800 IMS-B017 transputer IMS B426 inmos transputer
Contextual Info: Chapter 24 197 IMS B426 32-bit transputer 4 Mbytes Size 1 TRAM Ëmos' Engineering Data 4Mbytes DRAM Terminated links FEATURES • IMS T800 Transputer • 4 Mbyte of one wait-state DRAM 160 ns memory cycle time • Size 1 TRAM • • Communicates via 4 INMOS serial links

IMST222

Abstract: IMST225 lwm 2464 a T805-G20E
Contextual Info: SGS-THOMSON IMS T805E L K g lT IM M ! 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle tim e 20 M IPS peak instruction rate 2.8 M flops (peak) instruction rate Pin co m patible w ith IMS T800 Floating Point Unit

IMS T414

Abstract: inmos transputer T425 inmos T414 IMST425 T414 inmos transputer reference manual IMS T800 MARK RF01 T425 T800
Contextual Info: / / ,' ï ! I NMOS CORP IDE D I 4 ö 0 2 töfl OOOaSTl 3 I IM S T 425 transputer nnm os Advance Data FEATURES 30 MIPS peak 15 MIPS sustained performance 32 bit architecture IMS T800 & IMS T414-20 hardware/pin compatible 4 Kbytes on chip RAM for 120 Mbytes/sec data rate

B408

Abstract: B408 diode INMOS T800
Contextual Info: Chapter 26 209 IMS B408 Frame store TRAM Size 8 mos Engineering Data FEATURES GENERAL DESCRIPTION • The IMS B408 implements the drawing and image storage parts of a medium to high perform­ ance graphics system. It incorporates a powerful 32-bit microprocessor with on-chip FPU, 1 Mbyte

ZR34325

Abstract: IMS T800 F007A
Contextual Info: Chapter 12 119 IMS F007A DSP libraries, C interface generator & linker □ mos Product Information Software for the IMS B420 VecTRAM KEY FEATURES • A library of more than a 100 ANSI C routines for common signal/vector processing applications. • Compatible with Zoran’s library ZoranLib 2.0 for ZR34325.