ICC3 Search Results

Contextual Info: KM432S2030B Preliminary CMOS SDRAM R e v is io n H is to ry R e v is io n .2 M a y 1 9 9 8 P in # 7 0 M C H is c h a n g e d to N .C . R e v is io n .3 (J u n e 1 9 9 8 ) - ICC3N & IC C 3N S is u p d a te d . - T h e D e s c ip tio n o f M C H o n th e "P in F u n c tio n D e s c rip tio n " is d e le te d a n d th a t o f N C is a d d e d .

B1242

Abstract: free TSOP 1738 SMD A11L b1241 SMK2-67025EV-30SV qml-38535 75A8L tsop 1738 SMD package ASTM B32 AOR-A12R
Contextual Info: REVISIONS LTR DESCRIPTION DATE APPROVED A Added provisions for the inclusion of radiation-hardened devices. Updated boilerplate. Added case outline "Z" to drawing. Added device type 09 to drawing. - glg 00-01-21 Raymond Monnin B Corrections to table 1, ICC3 and ICC5, conditions column. - glg

KM432S2030B

Abstract: KM432S2030BT
Contextual Info: KM432S2030B Preliminary CMOS SDRAM Revision History Revision .2 May 1998 -. Pin #70 MCH is changed to N.C. Revision .3 (June 1998) - ICC3N & ICC3NS is updated. - The Desciption of MCH on the "Pin Function Description" is deleted and that of NC is added.

EM48BM1684LBA

Abstract: cke02 EM48BM1684LBA-75F 54bA
Contextual Info: eorex EM48BM1684LBA Revision History Revision 0.1 May. 2007 - First release. Revision 0.2 (May. 2008). - change package out-line spec : from 12.5mm x 10.0mm to 12.0mm x 10.0mm Revision 0.3 (Aug. 2008). - change ICC spec : ICC2N : 12 MA ICC2Ns. : 5 MA ICC3P :

KM432S2030BT

Contextual Info: KM432S2030B Preliminary CMOS SDRAM Revision History Revision .2 M a y 1 9 9 8 Pin # 7 0 M C H is c h a n g e d to N .C . Revision .3 (June 1 9 9 8) - ICC3N & ICC3NS is u p d a te d . - T h e Desciption of M C H on the "Pin Function Description" is d ele te d and th at of N C is add ed.

icc3

Abstract: M57788SH 3125V m577
Contextual Info: Graph f-Po M57788SH Pout,Icc vs. freq. 12 Vcc1,2,3=12.5V, Pin=0.3W, Tc=+25deg.C Zg=Zl=50ohm 50 Po W Icc1 (A) Icc2 (A) Icc3 (A) Pout (W) 40 11 10 9 8 7 30 6 5 20 4 3 2 10 1 460 470 480 490 500 freq.(MHz) -1- 510 520 530 540 Icc1/Icc2/Icc3 (A) 60 Graph Pin-Po(fL)

Contextual Info: IC42S32200 IC42S32200L Document Title 512K x 32 Bit x 4 Banks 64-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B Initial Draft Obselete partial refresh function Obselete 5ns speed grade Change ICC3P from 3mA to 5mA September 26,2002 September 05,2003

Contextual Info: KM432S2020B Preliminary CMOS SDRAM R evision H istory Revision .1 M ay 1998 - Pin #70 MCH is cha ng ed to N.C. R evision .2 (June 1998) - ICC3N & ICC3NS is updated. R evision .3 (July 1998) -.D Q B uffer and IBIS ch a ra cte ristics are elim inated. REV. 3 July 1998

zobel

Abstract: 500w power amplifier stereo ENA0177 icc3 icc1 sanyo 16 10X10 AES17 Class-d amplifier BTL audio 100w 100w audio amplifier circuit diagram
Contextual Info: Ordering number : ENA0177 Monolithic Linear IC ICC1 PWM Controller IC for Digital Power Amplifier Overview Control chip for high performance stereo class-d amplifier with power range from 20-500W. Used together with the ICC3 driver chip the system will include a full protection scheme including: current limitation, short circuit protection, thermal

EM78P156ELP

Abstract: EM78P156 pin configuration of em78p156 EM78P156ELP application EM78P156ELM EM78P156E AN-003 EM78P156EL EM78P156ELAS EM78P156ELKM
Contextual Info: EM78P156EL OTP ROM EM78P156EL 8-BIT MICRO-CONTROLLER Version 1.3 EM78P156EL OTP ROM Specification Revision History Version Content 1.0 Initial version 1.1 Change set up time period 1.2 04/19/2002 Change Power on reset content 07/01/2003 Change ISB1 & ICC3 current range

KM4132G512Q-10

Abstract: KM4132G512Q KM4132G512 KM4132G512Q7 KM4132G512Q8 KM4132G512Q-7 KM4132G512Q-8 KM4132G512-G KM4132G512TQ10 KM4132G512TQ-6
Contextual Info: KM4132G512 CMOS SGRAM Revision History Revision 2.2 June 1998 • Added Low Power version product (KM4132G512-G*). • Changed ICC3N from 50mA to 60mA, ICC3NS from 30mA to 40mA in DC CHARACTERISTICS. Revision 2.1 (May 1998) • Added KM4132G512-6 product(166MHz @ CL =3).

IDT7025S35GB

Abstract: qml-38535 5962-9161708MXA IDT7025L45FB smd marking 5R TSOP 66 thermal resistance SMK2-67025EV-30SV SMD MARKING CODE UBR
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA A Added provisions for the inclusion of radiation-hardened devices. Updated boilerplate. Added case outline "Z" to drawing. Added device type 09 to drawing. - glg 00-01-21 Raymond Monnin B Corrections to table 1, ICC3 and ICC5 conditions column. - glg

Contextual Info: KM432S2020B Preliminary CMOS SDRAM R evision H istory Revision .1 M ay 1998 - Pin #70 MCH is cha ng ed to N.C. R evision .2 (June 1998) - ICC3N & ICC3NS is updated. R evision .3 (July 1998) -.D Q B uffer and IBIS ch a ra cte ristics are elim inated. REV. 3 July 1998

CDC2509

Abstract: MA2180
Contextual Info: SDRAM MODULE Preliminary KMM377S3227BT Revision History Revision .2 Jan. 1998 •DC Characteristics values are changed. : ICC2 N & ICC3 N •STANDARD TIMING DIAGRAM is changed . •All AC parameters are measured by module tap reference(refer to page#5) •CAS Latency is based on Reg. DIMM (In case of Unbuff. DIMM CAS Latency is 1 CLK earlier than this)

256KX8 SIMM

Abstract: 80 pin simm flash
Contextual Info: WDl Selector Guide ELECTRONIC DESIGNS INC. Density Organization Part No. Speed ns NEW Max Current (mA) ICC1 ICC3 ✓ ✓ V ✓ 256Kx8 2 2 4 4 256Kx8 256Kx8 512Kx8 512Kx8 512Kx8 Megabits Megabits Megabits Megabits EDI8F8257C-B6ClP EDI8F8257C-BPCLP EDI8F8259C-M6C

IC42S32200

Abstract: IC42S32200L DR036-0D
Contextual Info: IC42S32200 IC42S32200L Document Title 512K x 32 Bit x 4 Banks 64-MBIT SDRAM Revision History Revision No History Draft Date 0A 0B Initial Draft Obselete partial refresh function Obselete 5ns speed grade Change ICC3P from 3mA to 5mA Revise typo Revise p.20,p.22 data and p.28 typo

Contextual Info: KM432S2030B Preliminary CMOS SDRAM R evision H istory R evision .2 M ay 1998 Pin #70 M CH is cha ng ed to N.C. R evision .3 (June 1998) - ICC3N & ICC3NS is updated. - T h e D esciption of M CH on the "Pin F unction D e scriptio n" is deleted and that of NC is added.

icc3

Abstract: M57788UH 3125V M5778 M57788
Contextual Info: Graph f-Po M57788UH Pout,Icc vs. freq. 12 Po W Icc1 (A) Icc2 (A) Icc3 (A) 50 Vcc1,2,3=12.5V, Pin=0.3W, Tc=+25deg.C Zg=Zl=50ohm Pout (W) 40 11 10 9 8 7 30 6 5 20 4 3 10 2 1 440 450 460 470 480 freq.(MHz) -1- 490 500 510 520 Icc1/Icc2/Icc3 (A) 60 Graph Pin-Po(fL)

EM484M1644VTA

Contextual Info: eorex EM484M1644VTA Revision History Revision 0.1 Jun. 2009 -First release Revision 0.2 (July 2013) -Update DC/AC parameter -DC parameters update points. 1. ICC2P 1.5ma to 10ma. 2. ICC2PS 1ma to 5ma. 3. ICC2N 20ma to 30ma. 4. ICC2NS 10ma to 25ma. 5. ICC3P 7ma to 30ma.

80 pin simm flash

Abstract: 45/EDI8F16256C-M
Contextual Info: \ Selector Guide ELECTRONIC DESI3NS INC Of nsity Organization Part No. Speed ns NEW ✓ ✓ ✓ ✓ Page LP Signifies that a Low Power Version with Data Retention function is available x8 SRAMs ✓ Package Max Current (mA) ICC1 ICC3 2: Megabits 256KX8 EDI8F8257C-B6CLP

Contextual Info: KM432S2020B Preliminary CMOS SDRAM Revision History Revision .1 May 1998 - Pin #70 MCH is changed to N.C. Revision .2 (June 1998) - ICC3N & ICC3NS is updated. Revision .3 (July 1998) -.DQ Buffer and IBIS characteristics are eliminated. REV. 3 July 1998 Preliminary

LF400

Contextual Info: TA8430AF- PRELIMINARY DATA STEPPING MOTOR DRIVER Unit in m m TA8430AF is 2 Phase Bipolar Stepping Motor Driver IC 16 designed especially for low operating voltage use j FDD and other portable equipments. 1 3.0 ±0.2 3.4 ± 0 4 r^ f 9 UUULjS M M . 2 Phase Bipolar Stepping Motor Driver

SMNS405A

Abstract: cms405 CMS408 CMS406
Contextual Info: CMS405, CMS406 4 MEGABYTE CMS407, CMS408 2 MEGABYTE DRAM MEMORY CARDS SMNS405A-JUNE1991-REVISED JANUARY 1993 * Credit Card Size 85.6 mm x 54 mm x 60-PIN MEMORY CARD (CONNECTOR VIEW 3.4 mm) Single 5-V Power Supply (±5% Tolerance) * Enhanced Page Mode Operation

A9RV

Abstract: 5s a315 A327
Contextual Info: TOSHIBA TC514900AJLL-70/80 524,288 WORD X 9 BIT DYNAMIC RAM DESCRIPTION The TC514900AJLL is the new generation dynamic RAM organized 524,288 word by 9 bit. The TC514900AJLL utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit