I500PS Search Results
I500PS Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: * SYNERG Y 1KX 4 ECL RAM SEMICONDUCTOR FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Address access time, U a : 5/6ns max. Chip select access time, tAc: 3/5ns max. Write pulse width, tww: 5/8ns min. Choice of two edge rates: 800 or I500ps typ. |
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i500ps-220masy10474-5dcfsy10474-5dcs+6 | |
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Contextual Info: SY100S366 9-BIT COMPARATOR SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Max. propagation delay of I500ps ■ le e min. of-120mA ■ ESD protection of 2000V ■ Industry standard 100K ECL levels ■ Extended supply voltage option: — VEE = -4.2V to -5.46V |
OCR Scan |
sy100s366i500psof-120ma75ki2+6 | |
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Contextual Info: * 3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER SYNERGY SEMICONDUCTOR DESCRIPTION FEATU R ES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ I500ps max. clock to bus data transmit 1000ps max. clock to Q (data receive) 250 cutoff bus outputs 50Q receiver outputs |
OCR Scan |
sy10e337sy100e337i500ps1000ps+1 | |
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Contextual Info: « SY100480-8 SY101480-8 SY100480-10 SY101480-10 H r p i rj a lt/l ECL RAM SYNERGY SEMICONDUCTOR FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Address access time, tAA: 8/10ns max. Chip select access time, tAc: 4/5ns max. Choice of two edge rates: 800 or I500ps typ. |
OCR Scan |
sy100480-8sy101480-8sy100480-10sy101480-10+6 | |
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Contextual Info: * SY10480-8 SY10480-10 16K x 1 ECLRAM SYNERGY SEM ICO NDUCTO R DESCRIPTION FEATURES The Synergy SY10480 is a 16384-bit Random Access Memory RAM , designed with advanced Emitter Coupled Logic (ECL) circuitry. The SY10480 is organized as 16384words-by-1-bit, meets the standard 10K family signal and |
OCR Scan |
sy10480-8sy10480-10sy1048016384-bit+4 | |
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Contextual Info: * SYNERGY SY10422-5 SY10422-6 256 x 4 ECL RAM SEMICONDUCTOR FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION The Synergy SY10422 is a 1024-bit Random Access Memory RAM , designed with advanced Emitter Coupled Logic (ECL) circuitry. The SY10422 is organized as 256words-by-4-bits, meets the standard 10K family signal and |
OCR Scan |
sy10422-5sy10422-6sy104221024-bit+4 | |
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Contextual Info: SY100484-8 SY101484-8 SY100484-10 SY101484-10 «0« SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Address access time, U a : 8/1 0ns max. ■ Chip select access time, tAc: 4/5ns max. ■ Write pulse width, tww: 10ns min. The Synergy S Y 100/101484 are 16384-bit Random |
OCR Scan |
sy100484-8sy101484-8sy100484-10sy101484-10+5 | |
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Contextual Info: * SY100422-5 SY101422-5 SY100422-6 SY101422-6 occ „ n> ti 256 x 4 E C L R A M SYNERGY SEMICONDUCTOR FEA TU R ES DESCRIPTIO N Address access time, tAA: 5/6ns max. Block select access time, tAB: 3/4ns max. The Synergy S Y 1 00/101422 are 1024-bit Random Access |
OCR Scan |
sy100422-5sy101422-5sy100422-6sy101422-6+6 |