SY100480 Search Results
SY100480 Datasheets Context Search
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Contextual Info: * SY100480-6 SY101480-6 16K x 1 ECL RAM SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES The Synergy SY100/101480 are 16384-bit Random Access Memories RAMs , designed with advanced Emitter Coupled Logic (ECL) circuitry. The SY100/101480 are organized as 16384-words-by-1-bit, meet the standard 100K |
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sy100480-6sy101480-6sy100/10148016384-bit+4 | |
SY100480-8DCFContextual Info: SY N E R G Y S E M I C O N D U C T O R « S7E » • TDD13Ö1 0GGQD27 22^ SY10480-8/10 16K X 1 ECL RAM SYNERGY SY100480-8/10 SEMICONDUCTOR SY101480-8/10 DESCRIPTION FEATURES The Synergy SY10/100/101480 are 16384-bit Random Access Memories RAMs , designed with advanced Emitter |
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tdd130ggqd27sy10480-8/10sy100480-8/10+6 | |
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Contextual Info: « SY100480-8 SY101480-8 SY100480-10 SY101480-10 H r p i rj a lt/l ECL RAM SYNERGY SEMICONDUCTOR FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Address access time, tAA: 8/10ns max. Chip select access time, tAc: 4/5ns max. Choice of two edge rates: 800 or I500ps typ. |
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sy100480-8sy101480-8sy100480-10sy101480-10+6 | |
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Contextual Info: 5 7E » SYNERGY SEMIC ON DUC TOR IQOlBfll OOOOOE1 flOO SY10480-6 * 16K x 1 ECL RAM SYNERGY SEMICONDUCTOR SY100480-6 SY101480-6 - ^ - 2 3 - 0 ys DESCRIPTION FEATURES The Synergy SY10/100/101480 are 16384-bit Random Access Memories RAMs , designed with advanced Emitter |
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sy10480-6sy100480-6sy101480-6500ps+6 | |
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Contextual Info: * SY10/100/101480-6 SY10/100/101480-8 SY10/100/101480-10 16K x 1 EC L RAM SYNERGY S E M IC O N D U C TO R DESCRIPTION FEATURES • Address access time, tAA: 6/8/10ns max. ■ Chip select access time, tAC: The Synergy SY10/100/101480 are 16384-bit Random Access Memories RAMs , designed with advanced Emitter |
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sy10/100/101480-6sy10/100/101480-8sy10/100/101480-106/8/10ns+6 | |
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Contextual Info: * SY10/100/101480-6 SY10/100/101480-8 SY10/100/101480-10 16K x 1 ECL RAM SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES The Synergy SY10/100/101480 are 16384-bit Random Access Memories RAMs , designed with advanced Emitter Coupled Logic (ECL) circuitry. The devices are organized |
OCR Scan |
sy10/100/101480-6sy10/100/101480-8sy10/100/101480-10sy10/100/101480+5 |