I13P Search Results

O16N

Abstract: I22P I29N O09P O26P O27P O16P O25P O31P I28P
Contextual Info: a 34 ؋ 34, 3.2 Gbps Asynchronous Digital Crosspoint Switch AD8152 FEATURES Low Cost Low Power 2.0 W @ 2.5 V Outputs Enabled <100 mW @ 2.5 V (Outputs Disabled) 34 ؋ 34, Fully Differential, Nonblocking Array 3.2 Gbps per Port NRZ Data Rate Wide Power Supply Range: 2.5 V to 3.3 V

schematic diagram 12v ac/dc regulator

Abstract: regulator 12v with stand by 220 ac voltage regulator without transformer schematic diagram 12v Simple DC Voltage Regulator L4992 TQFP32
Contextual Info: L4992 TRIPLE OUTPUT POWER SUPPLY CONTROLLER DUAL PWM BUCK CONTROLLERS 3.3V and 5.1V 12V/120mA LINEAR REGULATOR DUAL SYNCH RECTIFIERS DRIVERS 96% EFFICIENCY ACHIEVABLE 50µA (@ 12V) STAND BY CONSUMPTION 5.5V TO 25V SUPPLY VOLTAGE EXCELLENT LOAD TRANSIENT RESPONSE

O09P

Abstract: AD8152 AD8152-EVAL AD8152JBP I18N
Contextual Info: a 34 ؋ 34, 3.2 Gbps Asynchronous Digital Crosspoint Switch AD8152* FEATURES Low Cost Low Power 2.0 W @ 2.5 V Outputs Enabled <100 mW @ 2.5 V (Outputs Disabled) 34 ؋ 34, Fully Differential, Nonblocking Array 3.2 Gbps per Port NRZ Data Rate Wide Power Supply Range: 2.5 V to 3.3 V

L4992

Abstract: TQFP32 20SA100K dc swinging choke Tantalum capacitors TCC 47uF 6.3V
Contextual Info: L4992  TRIPLE OUTPUT POWER SUPPLY CONTROLLER DUAL PWM BUCK CONTROLLERS 3.3V and 5.1V 12V/120mA LINEAR REGULATOR DUAL SYNCH RECTIFIERS DRIVERS 96% EFFICIENCY ACHIEVABLE 50µA (@ 12V) STAND BY CONSUMPTION 5.5V TO 25V SUPPLY VOLTAGE EXCELLENT LOAD TRANSIENT RESPONSE

schematic diagram 12v ac/dc regulator

Abstract: L4992 TQFP32
Contextual Info: L4992 TRIPLE OUTPUT POWER SUPPLY CONTROLLER DUAL PWM BUCK CONTROLLERS 3.3V and 5.1V 12V/120mA LINEAR REGULATOR DUAL SYNCH RECTIFIERS DRIVERS 96% EFFICIENCY ACHIEVABLE 50µA (@ 12V) STAND BY CONSUMPTION 5.5V TO 25V SUPPLY VOLTAGE EXCELLENT LOAD TRANSIENT RESPONSE

20SA100K

Abstract: L4992 TQFP32 voltage to pwm converter 555 3A Step upwards Switching voltage Regulator D98IN8 WSL-2512R0251
Contextual Info: L4992 TRIPLE OUTPUT POWER SUPPLY CONTROLLER DUAL PWM BUCK CONTROLLERS 3.3V and 5.1V 12V/120mA LINEAR REGULATOR DUAL SYNCH RECTIFIERS DRIVERS 96% EFFICIENCY ACHIEVABLE 50µA (@ 12V) STAND BY CONSUMPTION 5.5V TO 25V SUPPLY VOLTAGE EXCELLENT LOAD TRANSIENT RESPONSE

I22P

Abstract: I21P I18N AD8152 AD8152-EVAL AD8152JBP O01p O25P PS760 o15p
Contextual Info: a 34 ؋ 34, 3.2 Gbps Asynchronous Digital Crosspoint Switch AD8152* FEATURES Low Cost Low Power 2.0 W @ 2.5 V Outputs Enabled <100 mW @ 2.5 V (Outputs Disabled) 34 ؋ 34, Fully Differential, Nonblocking Array 3.2 Gbps per Port NRZ Data Rate Wide Power Supply Range: 2.5 V to 3.3 V

20SA100K

Abstract: L4992 TQFP32 flyback isolated low power UC 1S325 WSL-2512R0251 I13P sanyo 103 490 0220 Si941 si94
Contextual Info: L4992 TRIPLE OUTPUT POWER SUPPLY CONTROLLER DUAL PWM BUCK CONTROLLERS 3.3V and 5.1V 12V/120mA LINEAR REGULATOR DUAL SYNCH RECTIFIERS DRIVERS 96% EFFICIENCY ACHIEVABLE 50µA (@ 12V) STAND BY CONSUMPTION 5.5V TO 25V SUPPLY VOLTAGE EXCELLENT LOAD TRANSIENT RESPONSE

Contextual Info: a 34 ؋ 34, 3.2 Gbps Asynchronous Digital Crosspoint Switch AD8152 FEATURES Low Cost Low Power 2.0 W @ 2.5 V Outputs Enabled <100 mW @ 2.5 V (Outputs Disabled) 34 ؋ 34, Fully Differential, Nonblocking Array 3.2 Gbps per Port NRZ Data Rate Wide Power Supply Range: 2.5 V to 3.3 V

verilog code for routing table

Abstract: VHDL code for pci xilinx vhdl code verilog code for pci Master/Target PCI VHDL Core
Contextual Info:  Using pre-implemented LogiCORE PCI Interfaces with VHDL and Verilog March 1997 Version 1.2ed Application Note Summary This application note details the steps required to implement and simulate LogiCORE PCI Interfaces with VHDL and Verilog. Xilinx LogiCORE Required

written

Abstract: XC4010E-PQ160 PQ160 PQ208 PQ240 TQ144 XC4000 XC4000E XC4010E XC4013E
Contextual Info: LogiCore PCI Master and Slave Interface User's Guide November 1, 1996 Version 1.1 LC-DI-PCIM-C and LC-DI-PCIS-C Table of Contents LogiCore Facts 1. Introduction . 1 2. Getting Started . 3

Xilinx PCI logicore

Abstract: xilinx xact viewlogic interface user guide XC4000E XC4013E Signal Path Designer VHDL code for pci
Contextual Info: Design Methodologies for Core-Based FPGA Designs Jerry Case, Nupur Gupta, Jayant Mittal and David Ridgeway Abstract The adoption of design re-use has resulted in the availability of a variety of implementation options. Each option in turn offers a distinct design methodology that must be adhered to

Contextual Info: ROHM CO LTD t 40E 7 Ô S Û cl cn D Q004M51 BA4230AF I C / I C s for Audio Applications < 7 ESRHM ~7z 7 7 ~ 0 S- 0 ~ 7 1.5V F M /A M -IF y X x A I C 1.5V F M /A M -IF Sytem IC BA4230AF i, 1.5V-fey h f flt C & fS U fc F M / A M -lF y X x M C T 't o 18 17 16 15 14 13 12 11 10

Contextual Info: 22-Port Fibre Channel Accelerated JBOD Chip Datasheet Advance Product Information Subject to Change VMDS-10098 Revision 2.0 April 22, 2005 Downloaded by data_acq@partminer.com on September 22, 2009 from Vitesse.com VSC7196 VSC7196 Datasheet Advance Product Information