HISW Search Results

microdot s-50

Contextual Info: ▼ 1 REVISIONS ZONE E CW LTR 2m J /,2 .8 0 P E F, K. :l .0/0 DESCRIPTION /hiSWATOtì. /S X 000~G3Qt~a/S7 $ IQ $ .4 z W AS' ù ù i‘ / T£M j;m $ - 384» U APPROVED DATE / /il ÔO3’ 0 $ J Z -Û Q O / oo 2 - o o u p d a t e " r ev . ïi- o o o i L E T t m . :.:

TL82

Abstract: 9C04021A49R9FLHF3 ATF551M4 ATF-551M4 SRLC16 251R07C2R2BV4E C3 5091
Contextual Info: Design of a 4.9 to 6.0 GHz Two-stage Low Noise Amplifier For 802.11a, HiperLAN2 and HiSWANa Receivers Using ATF-551M4 E-PHEMT Application Note 5091 This application note examines the design of a compact 6 mm by 15 mm two-stage, low noise, unconditionally

skyCross

Contextual Info: Antenna Products SMA-5TO6-U Antenna Element SMA-5TO6-UA Connectorized Element 5.1—5.9 GHz Connectorized WLAN Loop Antenna for 802.11a, HiperLAN2, CSMA and HiSWANa Wireless Applications Features • • • • • Very Efficient MLA Technology Upper and lower U-NII Band

lvds 1120

Abstract: 10,7 MHz Filter QFN48 6x6 SCAS862A
Contextual Info: CDCE62005 www.ti.com . SCAS862A – NOVEMBER 2008 – REVISED MARCH 2009 Five/Ten Output Clock Generator/Jitter Cleaner

Contextual Info: CDCE62005 www.ti.com . SCAS862A – NOVEMBER 2008 – REVISED MARCH 2009 Five/Ten Output Clock Generator/Jitter Cleaner

Contextual Info: TOSHIBA TA8801 AN TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT T A a a m • m m ■ SILICON MONOLITHIC an m m a w VIDEO/CHROMA/DEFLECTION PROCESSOR 1C FOR NTSC COLOR TV TA8801AN is an integrated circuit for NTSC color TV, which has a function of Video/Chroma/Deflection

Contextual Info: D S 1 0 7 5 -IN D PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1075-IND EconO scillator/D ivider PIN ASSIGNMENT • Dual Fixed frequency outputs 200 KHz - 100 MHz • U ser-program m able o n -ch ip dividers (from 1 - 5 1 3 ) I/O DE 1 8 3D O SC IN n r 2 7

ofdm signal

Abstract: RFSP5010
Contextual Info: Advanced RFSP5010 4.9-5.9 GHz U-NII Power Amplifier Product Description The RFSP5010 power amplifier is a highperformance GaAs HBT IC designed for use in transmit applications in the 4.9-5.9 GHz frequency band. With a P1dB of +23 dBm, the device is ideal for wireless LAN

Contextual Info: 3 S S .9 5 0 CM a O Li:i ♦ r t + •— f — + * * f — U45 1.595 1 .0 3 0 ^ 1-050 Li u . 0 5 0 NOTE- . . TO B E 'U S E D ^ T H A PPÄÖ PR /4TE C o m m e /?c ja l m a t ^ / v- il o k T ^ p in s HOUSING» N* MATERIAL 4 COLOR j-4 ö o e 7ö -o NYLON NATURAL

Contextual Info: CDCE18005 SCAS863A – NOVEMBER 2008 – REVISED JUNE 2011 www.ti.com Five/Ten Output Clock Programmable Buffer Check for Samples: CDCE18005 FEATURES APPLICATIONS • • • • • • • • 1 • • • • • • • • • • • Universal Input Buffers That Accept LVPECL,

ICH5R

Contextual Info: Intel E8500 Chipset North Bridge NB Datasheet March 2005 Document Number: 306745-001 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN

AUO-G1422.1U

Abstract: isl6247 quanta C1158 20/AUO-G1422.1U LM90 1b h 504 Socket AM2 quanta computer ot 409 w27 AO4413
Contextual Info: 1 2 3 4 5 6 7 8 PA1 BLOCK DIAGRAM NWD/PRESCOTT / SPRINGDALE AC/BATT CONNECTOR A CPU Thermal Sensor NWD/PRESCOTT PG 41 478 Pins BATT CHARGER Micro-FCPGA PG 41 Clocking CPU CORE DC/DC CK409 ISL6247 MAX1632 PG 4 PG 3 PG 4, 5 A PG 36 PG 39,40 Video RAM PG 14,15

M08A

Abstract: MTC08 NM24C08U NM24C09U
Contextual Info: E M IC O N D U C T D R tm NM24C08U/NM24C09U 8K-Bit Serial EEPROM 2-Wire Bus Interface General Description, Functions The NM 24C08U/09U devices are 8K 8,192 bit serial interface CMOS EEPROMs (Electrically Erasable Program mable Read­ O nly Memory). These devices fully conform to the Standard l2C

TLP 3615

Abstract: 359BH dllp 30240* intel 98822 TLP 3616
Contextual Info: Intel E7525 Memory Controller Hub MCH Datasheet August 2004 Document Number: 302405-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN

transistor c1419

Abstract: transistor C1162 equivalent of transistor c4751 c1162 transistor npn c1008 C1449 transistor intel 945 motherboard schematic diagram c1419 transistor c1295 battery transistor c1394
Contextual Info: Intel Xeon Processor with 512 KB L2 Cache and Intel® E7500 Chipset Platform Design Guide March 2002 Document Number: 298649-002 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any

9N90

Abstract: CDCE18005 CDCE62005 QFN-48 S-PQFP-N48
Contextual Info: CDCE18005 www.ti.com. SCAS863 – NOVEMBER 2008 Five/Ten Output Clock Generator/Buffer

BGA Solder Ball collapse

Abstract: E7520 6300ESB 6700PXH 82801ER DDR2-400 DDR266 DDR333 6597 ZPD ITT diode 3 3
Contextual Info: Intel E7520 Memory Controller Hub MCH Datasheet February 2005 Document Number: 303006-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN

QFN PACKAGE thermal resistance

Contextual Info: CDCE18005 SCAS863A – NOVEMBER 2008 – REVISED JUNE 2011 www.ti.com Five/Ten Output Clock Programmable Buffer Check for Samples: CDCE18005 FEATURES APPLICATIONS • • • • • • • • 1 • • • • • • • • • • • Universal Input Buffers That Accept LVPECL,

M21424

Abstract: M21428
Contextual Info: M21404/M21414/M21424 SD, HD 2xHD Cable Equalizers The M21404/M21414/M21424 are high-speed, low-power, adaptive co-axial cable equalizers designed to increase the maximum low-jitter transmission distance of serial digital interface SDI video signals and DVB-ASI across

fet t60

Abstract: DS248Q
Contextual Info: DS2480 PRELIMINARY DALLAS DS2480 Serial 1—W ire Line Driver s e m ic o n d u c to r FEATURES PIN ASSIGNMENT • Universal, com m on-ground serial port to 1—W ire ™ line driver for M icroLAN ™ applications • M eetsiB utton™ and MicroLAN com m unication Stan­

DSA00261345

Abstract: S-PQFP-N48 CDCE62005 QFN-48 600 UXP
Contextual Info: CDCE62005 www.ti.com. SCAS862 – NOVEMBER 2008 Five/Ten Output Clock Generator/Jitter Cleaner

TA8801

Abstract: ZD6A CSB503F30 murata tv flyback oscillator wv-d TA8801AN U101 fxs interface integrated circuit 206EB
Contextual Info: TA8801 AN TO SHIBA TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT T• A t a m m mf ■ SILICON MONOLITHIC a m n■ v m VIDEO /CHROMA /DEFLECTION PROCESSOR IC FOR NTSC COLOR TV TA8801AN is an integrated circuit for NTSC color TV, which has a function of Video/Chrom a/D eflection

Contextual Info: CDCE18005 www.ti.com SCAS863B – NOVEMBER 2008 – REVISED NOVEMBER 2012 Five/Ten Output Clock Programmable Buffer Check for Samples: CDCE18005 FEATURES APPLICATIONS • • • • • • • • 1 • • • • • • • • • • • Universal Input Buffers That Accept LVPECL,

2547h

Abstract: chipkill 82801CA 82870P2 E7500 P64H2 82802b 152364
Contextual Info: Intel E7500 Chipset Datasheet Intel® E7500 Memory Controller Hub MCH February 2002 Document Number: 290730-001 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual