GT64240 Search Results

GT64240 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
GT-6424 Contextual Info: RM7935/RM7965 Microprocessors Released RM7935/RM7965 64-bit Microprocessors with Integrated L2 Cache and EJTAG FEATURES High-performance Floating Point Unit IEEE 754 . • Fixed-point DSP instructions such as Multiply/Add, Multiply/Subtract, and 3 Operand Multiply.	Original	RM7935/RM7965 RM7935/RM7965 64-bit 32-bit RM7935. RM7965. PMC-2030350 GT-6424	PDF
GT-64240 Abstract: gt64240 ieee 32 bit floating point multiplier IT8172 RM5261A RM5231A RM7035C RM7065C EV-64120A it8172g Contextual Info: RM5231A/RM5261A Microprocessors Released 64-Bit MIPS RISC Microprocessors with 32/64-bit System Bus FEATURES Virtually indexed, physically tagged. Write-back and write-through on per-page basis. • Pipeline restart on first double word for data cache misses.	Original	RM5231A/RM5261A 64-Bit 32/64-bit 64/32/16/8-bit 64/32-bit PMC-2010740 GT-64240 gt64240 ieee 32 bit floating point multiplier IT8172 RM5261A RM5231A RM7035C RM7065C EV-64120A it8172g	PDF
RM7065C Abstract: RM7035C exposed tektronix 466 RM5231A RM5261A RM7065 RM7065A gt-64240 GT64240 Contextual Info: RM7035C/RM7065C Microprocessors Preliminary 64-Bit MIPS RISC Microprocessors with Integrated L2 Cache FEATURES 16 Kbytes instruction, 16 Kbytes data, 256 Kbytes on-chip secondary. • Per line cache locking in primaries and secondary. • Fast Packet Cache increases	Original	RM7035C/RM7065C 64-Bit PMC-2020578 RM7065C RM7035C exposed tektronix 466 RM5231A RM5261A RM7065 RM7065A gt-64240 GT64240	PDF
gt-64240 Abstract: RM7000C MIPS GT-96122 RM5271 RM7000 RM7000A RM7000B gt64240 16 bit single cycle mips Contextual Info: RM7000C Released 64-Bit MIPS RISC Microprocessor with Integrated L2 Cache FEATURES 16 Kbytes instruction, 16 Kbytes data, 256 Kbytes on-chip secondary. • Per line cache locking in primaries and secondary. • Fast Packet Cache increases system efficiency in networking	Original	RM7000C 64-Bit gt-64240 RM7000C MIPS GT-96122 RM5271 RM7000 RM7000A RM7000B gt64240 16 bit single cycle mips	PDF
RM7900 Contextual Info: RM7900 Microprocessor Advanced RM7900 64-bit MIPS RISC Microprocessor with Integrated L2 Cache and EJTAG FEATURES Fully associative 64-entry TLB with dual pages. • High-performance Floating Point Unit IEEE 754 . • Fixed-point DSP instructions such as Multiply/Add, Multiply/Subtract,	Original	RM7900 RM7900 64-bit 64-entry PMC-2030269	PDF
gt-64240 Abstract: gt64240 Marvell MARVELL SEMICONDUCTOR R5000 RM7000A RM527X Contextual Info: High-Performance MIPS System Controller for Communications Applications The Discovery GT-64240 provides a breakthrough in MIPS®-based communications systems architecture, setting a new standard for performance and integration. Communications Applications	Original	GT-64240 GT-64240 gt64240 Marvell MARVELL SEMICONDUCTOR R5000 RM7000A RM527X	PDF
RM7000C Abstract: RM7000 600MHz RM7000 GT-6424 IEEE754 Contextual Info: RM7000C Preliminary 64-Bit MIPS RISC Microprocessor with Integrated L2 Cache FEATURES 1600 Mbyte per-second peak throughput • 200 MHz max. freq., HSTL multiplexed address/data bus SysAD200 • Supports two outstanding reads with out-of-order return High-performance floating-point unit	Original	RM7000C 64-Bit SysAD200) IEEE754 32bit RM7000C RM7000 600MHz RM7000 GT-6424	PDF
IEEE754 Abstract: RM5271 RM7000 RM7000A RM7000B RM7000C corelis 31X31 gt-64240 Contextual Info: RM7000C FEATURES Fast Packet Cache™ increases system efficiency in networking applications • Integrated external cache controller up to 64 MB • User-selectable EZ Cache protocol eliminates the need for external tag RAMs. • High-performance floating-point unit 1600 MFLOPS maximum	Original	RM7000CTM 32bit RM7000C IEEE754 RM5271 RM7000 RM7000A RM7000B corelis 31X31 gt-64240	PDF
EJTAG Abstract: 64-Bit Microprocessors RM7965 MIPS RM7965 RM5231A 32-bit microprocessor architecture marvell IEEE GT-64240 RM7035C RM7935 Contextual Info: RM7935/RM7965 64-bit Microprocessors with Integrated L2 Cache and EJTAG Released Product Brief PRODUCT HIGHLIGHTS • High-performance system interface: • New high performance MIPS64-compatible Instruction Set Architecture with integrated L2 cache and EJTAG:	Original	RM7935/RM7965 64-bit 32-bit RM7935. MIPS64-compatible RM7965. PMC-2030350 EJTAG 64-Bit Microprocessors RM7965 MIPS RM7965 RM5231A 32-bit microprocessor architecture marvell IEEE GT-64240 RM7035C RM7935	PDF
GT-6424 Abstract: RM7000C Contextual Info: RM7000C FEATURES Fast Packet Cache™ increases system efficiency in networking applications • Integrated external cache controller up to 64 MB • User-selectable EZ Cache protocol eliminates the need for external tag RAMs. • High-performance floating-point unit 1600 MFLOPS maximum	Original	RM7000CTM 64-Bit 32-byte RM7000C 31x31 GT-6424	PDF
RM7900 Abstract: RM7000B 64-ENTRY GT-6424 corelis EJTAG GT-64240 RM7000A RM7000C epbga 304 Contextual Info: RM7900 Microprocessor Released RM7900 64-bit MIPS RISC Microprocessor with Integrated L2 Cache and EJTAG FEATURES Fully associative 64-entry TLB with dual pages. • High-performance Floating Point Unit IEEE 754 . • Fixed-point DSP instructions such as Multiply/Add, Multiply/Subtract,	Original	RM7900 RM7900 64-bit 64-entry PMC-2030269 RM7000B GT-6424 corelis EJTAG GT-64240 RM7000A RM7000C epbga 304	PDF