GS8342TXXA Search Results

Contextual Info: GS8342T08/09/18/36AE-300M 165-Bump BGA Military Temp 36Mb SigmaCIO DDR-II Burst of 2 SRAM 300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Military Temperature Range • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package

Contextual Info: GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaDDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface

Contextual Info: Preliminary GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus

Contextual Info: GS8342T08/09/18/36AE-300M 165-Bump BGA Military Temp 36Mb SigmaDDR-II Burst of 2 SRAM Features • Military Temperature Range • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface

Contextual Info: GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package

Contextual Info: GS8342T08/09/18/36AE-300M 165-Bump BGA Military Temp 36Mb SigmaDDR-II Burst of 2 SRAM Features • Military Temperature Range • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface

Contextual Info: GS8342T08/09/18/36AE-250/200/167 36Mb SigmaDDR-II Burst of 2 SRAM • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface • Byte Write x36, x18, and x9 and Nybble Write (x8) function

Contextual Info: GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaDDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface

Contextual Info: Preliminary GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus

GS8342T36AGE-200

Abstract: GS8342T36AE-300I GS8342T36AGE-250 GS8342T36AE-250
Contextual Info: Preliminary GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus

GS8342T36AE-250

Abstract: GS8342T36AGE-200 GS8342T36 GS8342T36AGE
Contextual Info: GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package