GFP 35 Search Results

DSF250

Abstract: MDX251 MSF250 Galazar
Contextual Info: MDX251 Product Brief MDX251 Fibre Channel / ESCON / FICON GFP-T Mapper Features MDX251 is a multi-channel GFP-T mapper for Storage Area Networking protocols. Connecting seamlessly with next-generation SONET/SDH framers supporting framemapped GFP, Virtual Concatenation and

EIA-296-E

Abstract: Fuse 250V 3.15 A glass CONQUER FUSE 030GFP
Contextual Info: Type GFE/GME/GFP/GMP5øx20mm Fast Acting Glass Tube Fuse Series GFE/GME GFP/GMP Approvals GFE/GME UL Listed CSA Certified MITI 10mA~10A 10mA~10A 1A~10A GFP/GMP With Pig-Tail UL Listed CSA Certified MITI 10mA~10A 10mA~10A 1A~10A Electrical Characteristics

gfp 35

Abstract: pse 10a 250V GFP 75A Fuse 250V 1A 250V fuse 14A Conquer
Contextual Info: CONQUER Miniature Fuse Type GFE/GME GFP/GMP GFE/GME GFP/GMP-A 5ØX20mm Fast Acting Glass Tube Fuse Series Catalog Ampere Number Rating Cold Ohms A2 Sec GME/GMP.010 10mA * * GME/GMP.020 20mA * * 1A~5A 125V/250V GME/GMP.030 30mA * * 6A~10A(250V) GME/GMP.032

BFAP20

Abstract: samsung ltcc G.SHDSL Industry Single-Chip VTSA7 447h LQ13 tag 9018 LM 205h 276 741h EoPDH
Contextual Info: Rev: 063008 DS33X162/DS33X161/DS33X82/DS33X81/ DS33X42/DS33X41/DS33X11/DS33W41/DS33W11 Ethernet Over PDH Mapping Devices General Description The DS33X162 family of semiconductor devices extend 10/100/1000Mbps Ethernet LAN segments by encapsulating MAC frames in GFP-F, HDLC, cHDLC,

GFP 740

Abstract: P6KE GFP 62A GFP 68a GFP 91A P6KE Series P6KE-62 P6KE10 P6KE1 P6KE12
Contextual Info: FCI Semiconductor TVS-P6KE series Preliminary Data Sheet GFP Transient Voltage Suppressor 6.8V to 200 V_ Electrical Description Jun-93 Mechanical Dimensions MM P6KE S eries /ic e Load JEDEC DO-15 1.00 Min. *— .300 — <-»

6685

Contextual Info: 1 I I I File No. 77GM-GFP-630211-2XX0X SHEET 1 / SPECIFICATION Voltage Rating : 250V AC RMS Current Rating : 1A Dielectric Withstanding Voltage:1000V AC RMS 60Hz For 1 Minute Insulation Resistance:5000 Megohms Min.At 500V DC Contact Resistance :25 Milliohms Max.

Contextual Info: Rev: 012108 DS33X162/DS33X161/DS33X82/DS33X81/ DS33X42/DS33X41/DS33X11/DS33W41/DS33W11 Ethernet Over PDH Mapping Devices General Description The DS33X162 family of semiconductor devices extend 10/100/1000Mbps Ethernet LAN segments by encapsulating MAC frames in GFP-F, HDLC, cHDLC,

Contextual Info: POWR-GARD Fuseblock Datasheet Accessories FUSE PULLERS & POWR-JAW CLIP CLAMPS Features/Benefits •฀ ฀ remove฀power฀fuses GFP •฀ Molded฀design฀offers฀more฀comfortable฀and฀natural฀฀

samsung ltcc

Contextual Info: PRELIMINARY Rev: 060607 DS33X162/DS33X161/DS33X82/DS33X81/ DS33X42/DS33X41/DS33X11/DS33W41/DS33W11 Ethernet Over PDH Mapping Devices General Description The DS33X162 family of semiconductor devices extend 10/100/1000Mbps Ethernet LAN segments by encapsulating MAC frames in GFP-F, HDLC, cHDLC,

RAMB16

Abstract: UG152 G.7041 GFP 1000BASE-X CRC-16 XAPP759 block code error management, verilog UCF virtex-4 vhdl code for ethernet mac spartan 3
Contextual Info: - DISCONTINUED PRODUCT - de-mapsv Generic Framing Procedure v2.1 DS303 April 25, 2008 Product Specification Introduction LogiCORE IP Facts The LogiCORE IP Generic Framing Procedure GFP core is a fully verified protocol encapsulation/de-encapsulation engine enabling efficient transport of LAN/SAN

GFp 85

Abstract: IXF18102 IXF18101 IXF18103 IXF18104 IXF30005 TRN4035BE TRN4035BS OTN SWITCH 273605
Contextual Info: product brief Intel IXF18102 10Gbps Physical Layer Device for STS-192c/STM 64c POS/GFP Product Description The Intel® IXF18102 is a highly integrated framer solution for STS-192c/STM 64c port applications. The IXF18102 supports various modes of operation for transport of HDLC

Contextual Info: I F ile No. I 77GM -GFP-231221 SHEET 1 / 1 SPECIFICATION Current Rating : 0.5A Dielectric Withwtanding Voltage: 500V AC Min. Contact Resistance : 30 Milliohms Max. Insulation Resistance : 1000 Megohms Min. Temperature : —40'C To + 1 0 5 ‘C Insulator : Glass—Reinforced Thermoplastic,Black

RPR MAC vhdl code

Abstract: 10BERR RPR vhdl code 10G Ethernet MAC frame by vhdl 1000BASE-X CRC-16 RAMB16 XAPP759 LocalLink
Contextual Info: de-mapsv Generic Framing Procedure v1.3 DS303 January 18, 2006 Product Specification Introduction LogiCORE Facts The LogiCORE Generic Framing Procedure GFP core is a fully verified protocol encapsulation/de-encapsulation engine enabling efficient transport of LAN/SAN client protocols over SONET/SDH-based networks.

Contextual Info: 1 I I I File No. I 77GM-GFP-232221 |SHEET 1 / SPECIFICATION Current Rating : 0.5A Pin 1 B Q — Dielectric Withwtanding Voltage: 500V AC Min. Contact Resistance : 30 Milliohms Max. Insulation Resistance : 1000 Megohms Min. Temperature : —55’C To + 8 5 ’C

Contextual Info: EtherMap-PDH TE8 Device Ethernet Over PDH Mapper TXC-07869 DATA SHEET TXC-07869-MB, Ed. 3 April, 2009 DESCRIPTION: The EtherMap®-PDH TE8 device maps Ethernet frames into Plesiochronous Digital Hierarchy PDH signals (E1/T1/J1), optimized for the Access network using GFP-F/HDLC, PDH VCAT and LCAS. Feature rich

Contextual Info: 31 I I File No. 77GM-GFP-xxxxxx SHEET 1 / 1 SPECIFICATION Circuit 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 A A Dimension B 3.75 5.00 6.25 7.50 8.75 10.00 11.25 12.50 13.75 15.00 16.25 17.50 18.75 20.00 21.25

TXC-07869

Abstract: relay UDM 112
Contextual Info: EtherMap-PDH TE8 Device Ethernet Over PDH Mapper TXC-07869 DATA SHEET Product Preview TXC-07869-MB, Ed. 2 January, 2009 DESCRIPTION: The EtherMap®-PDH TE8 device maps Ethernet frames into Plesiochronous Digital Hierarchy PDH signals (E1/T1/J1), optimized for the Access network using GFP-F/HDLC, PDH VCAT and LCAS. Feature rich

Contextual Info: 31 I I File No. 77GM-GFP-xxxxxx SHEET 1 / 1 SPECIFICATION Circuit 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 A A Dimension B 3.75 5.00 6.25 7.50 8.75 10.00 11.25 12.50 13.75 15.00 16.25 17.50 18.75 20.00 21.25

Contextual Info: 1 I 31 I I File No. 77GM-GFP-630211-1 xxox S H E E T SPECIFICATION C±0.40 <3— 2.54±0.05 R0.85 B±0.40 H Recommended PCB Layout A±0.30 Circuit 1 1 j O Q 05 ro o in "st" V 1 I D 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 i 1 I

STS21

Abstract: GR-253
Contextual Info: Product Brief November 2003 MARS1G2 P-VC TADMVC1G2 SONET/SDH 155/622/1244 Mbits/s Add/Drop Data Interface Features • ■ ■ ■ ■ One of the next-generation, system-on-a-chip devices of Agere Systems’ multiapplication and rate solutions MARSTM family of framers.

GR-253

Contextual Info: Product Brief November 2003 MARS622 P-VC TADMVC622 SONET/SDH 155/622 Mbits/s Add/Drop Data Interface Features • ■ ■ ■ ■ One of the next-generation, system-on-a-chip devices of Agere Systems’ multiapplication and rate solutions MARSTM family of framers.

GR-253

Abstract: concatenated and OC-3 and STM-1 MARS2G5
Contextual Info: Product Brief November 2003 MARS2G5 P-VC TADMVC2G52 SONET/SDH 155/622/2488 Mbits/s Add/Drop Data Interface Features • ■ ■ ■ ■ One of the next-generation, system-on-a-chip devices of Agere Systems’ multiapplication and rate solutions MARSTM family of framers.

LMI 458

Abstract: ic 321 ENC2COUNT tele 539 PE-MCXMAC 85z3 trxcom 8XC196KD transistor m1511 MAC5 circuit
Contextual Info: EtherMap -3 Device Ethernet into STS-3/STM-1 SONET/SDH Mapper TXC-04226 DATA SHEET PRODUCT PREVIEW • Supports up to eight 10/100 Mbit/s Ethernet ports, each using a SMII interface • Supports a single 1000 Mbit/s Ethernet port, using a parallel GMII interface lead shared with SMII interfaces

Contextual Info: EtherMap -3 Plus Device OC-3 Ethernet over SONET Mapper with Rapid Restoration TXC-04236 DATA SHEET HO/LO RING Ports TELECOM BUS SIDE +1.8V +3.3V HO/LO POH Ports The EtherMap™-3 Plus is a highly integrated EoS device that provides for mapping of 10/100/1000 Mbit/s Ethernet into SONET/SDH STS-3/STM-1