G704 Search Results

tsr1-24

Abstract: mxt 211 RSR1-24 B18 IC marking code EL B17
Contextual Info: Tem ic 29C96 MATRA MHS T1-DS1/E1-CEPT Framer Formater Description T he 29C96 is a program m able CM OS device interfacing with T1 DS1 or E l (CEPT) transceivers. T he 29C96 supports following fram e form ats : • DS1 : 4 fram es (D M I), D4 (G704), ESF (G704),

mxt 211

Contextual Info: Tem ic 29C96 MATRA MHS T1-DS1/E1-CEPT Framer Formatter Description The 29C96 is a programmable CMOS device interfacing with T1-DS1 or El-CEPT transceivers. The 29C96 supports following frame formats : • DS1 : 4 frames DMI , D4 (G704), ESF (G704), SLC-96 (DMI), DDS (DMI)

G704-E1

Abstract: vhdl code for nrz vhdl code g704 APA150-STD G704 vhdl code for frame synchronization 32 bit AHB lite bus
Contextual Info: AvnetCore: Datasheet Version 1.0, July 2006 G704-E1 Framer Intended Use: AHB Slave Bus tx_en RX FIFO MAC txd col crs rx_en load_ebl sda_in Serial I/F int_phy_status_changed — E1-ATM Interface Features: — G704 framing de-framing on E1 carriers — Basic & multi frame alignment

Contextual Info: A N A LO G D E V IC E S CMOS Low Voltage 4 i l , 4-Channel Multiplexer AD G704 FUNCTIONAL BLOCK DIAGRAM FEATURES +1.8 V to +5.5 V Single Supply 2.5 i l Typ On Resistance Low On-Resistance Flatness -3 dB Bandwidth >200 MHz Rail-to-Rail Operation 10-Lead (jiSOIC Package

mxt 211

Abstract: signalling and frame alignment in E1 G704 SLC96 alarm frame format b30 c300 - 1 tsr1-24
Contextual Info: 29C96 MATRA MHS T1-DS1/E1-CEPT Framer Formatter Description The 29C96 is a programmable CMOS device interfacing with T1-DS1 or E1-CEPT transceivers. The 29C96 supports following frame formats : D DS1 : 4 frames DMI , D4 (G704), ESF (G704), SLC-96 (DMI), DDS (DMI)

MC 4011 BCP

Abstract: PKT 4113 API ncp 6131 SWITCHING SYSTEMS INTERNATIONAL sqm 225 leach 1522 her 4541 MSP SNCP t 1451 n 52 toh SWITCHING SYSTEMS INTERNATIONAL sqm 350 k2400 EQUIVALENT
Contextual Info: EtherPHAST -24 Device 2x OC-12/STM-4 SONET/SDH Ethernet Mapper TXC-06745 DATA SHEET TXC-06745-MB, Ed. 2 February 2006 FEATURES APPLICATIONS • Client Interfaces: 2x GMII/24x SMII/4x TBI/MPI 24 channel packet all pin shared • Two serial Gigabit Ethernet (1.25 Gbit/s) ports with integrated CRSU/SerDes (8B/10B)

g70490

Abstract: G70810 g702 G70090 G70250 G70350 G70630 G71210 G71690
Contextual Info: P R O D U C T D E S C R IP T IO N PRODUCT FEATURES 3.5 micron CMOS Oxide-Isolated silicon-gate process Single level metalization 135 to 2535 2-input NAND equivalents Up to 88 I/O connections All Inputs and Outputs TTL or CMOS compatible All Inputs and Outputs protected from

MAX9271

Abstract: I2C address translator fakra connector 173KB RGBhv to MAX9272 IN50I FAKRA CABLE
Contextual Info: 19-6385; Rev 0; 7/12 EVALUATION KIT AVAILABLE MAX9271 16-Bit GMSL Serializer with Coax or STP Cable Drive General Description Benefits and Features The MAX9271 compact serializer is designed to drive 50I coax or 100I shielded twisted-pair STP cable. The

DS33R41

Abstract: DS21455 DS21458 DS2155 DS33Z41
Contextual Info: DS33R41 Inverse-Multiplexing Ethernet Mapper with Quad Integrated T1/E1/J1 Transceivers www.maxim-ic.com GENERAL DESCRIPTION FEATURES 10/100 IEEE 802.3 Ethernet MAC MII and RMII Half/Full Duplex with Automatic Flow Control The DS33R41 extends a 10/100 Ethernet LAN

G701

Abstract: tip 1050 G705 ga01 G301 G302 G501 G502 G702 G703
Contextual Info: iC-OG 8-BIT DIFFERENTIAL SCANNING OPTO ENCODER FEATURES APPLICATIONS ♦ Monolithic construction with integrated photodiodes ensures excellent matching and technical reliability ♦ Short track spacing of 600µm ♦ Elimination of dark currents through differential scanning

DS26504

Contextual Info: DESIGN KIT AVAILABLE DS26504 T1/E1/J1/64KCC BITS Element www.maxim-ic.com GENERAL DESCRIPTION The DS26504 is a building-integrated timing-supply BITS clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1, E1, 64kHz composite clock

XS85

Abstract: XS42 cecl 080 PEB 2254-H smd marking code zcs FALC54 PCM24 PCM30 PEB2254 P-MQFP-80-1
Contextual Info: ICs for Communications Framing and Line Interface Component for PCM 30 and PCM 24 FALC54 PEB 2254 Version 1.3 Data Sheet 11.96 T2254-XV13-D1-7600 PEB 2254 Revision History: Current Version: 11.96 Previous Version: 04.96 Page Page Subjects major changes since last revision

DS26521

Abstract: BTS 308 EC17 pinout of bel 187 transistor rspc 193 ec5 BBC FTL 3-2 G.SHDSL Industry Single-Chip DS2155 DS2156
Contextual Info: DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS33R11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over a T1/E1/J1 data stream. §

20EF TRANSFORMER

Abstract: TRANSFORMER 20EF 20F9 rexton AAIS mark csc 9102 D3318
Contextual Info: PRODUCT PREVIEW GENERAL DESCRIPTION The DS26519 is a single-chip 16-port framer and line interface unit LIU combination for T1, E1, and J1 applications. Each port is independently configurable, supporting both long-haul and short-haul lines. The DS26518 is a 8-port SCT. The DS26514 is a 4-port

RDC22

Contextual Info: PRELIMINARY DS21Q42 Enhanced QUAD T1 FRAMER DALLAS SEMICONDUCTOR FEATURES FUNCTIONAL DIAGRAM • Four T1 DS1/ISDN—PRI/J1 framing transceivers • All four framers are fully independent • Each of the four framers contain dual twoframe elastic store slip buffers that can connect

DS2155

Abstract: DS2155G DS2155GN DS2155L DS2155LN TR54016
Contextual Info: DALLAS SEMICONDUCTOR PRELIMINARY DS2155 T1/E1/J1 Single Chip Transceiver SCT FEATURES • • • • • • • • • • • • • • • • • • Complete DS1/ISDN–PRI/J1 transceiver functionality Complete E1 (CEPT) PCM-30/ISDN-PRI transceiver functionality

LB 11899

Abstract: DS21352 DS21352L DS21352LN DS21552 DS21552L DS21552LN TR54016 TCS 4199
Contextual Info: 3.3V DS21352 and 5V DS21552 T1 Single Chip Transceivers SCT www.dalsemi.com FEATURES § § § § § § § § § § § § § § § § Complete DS1/ISDN–PRI/J1 transceiver functionality Long and Short haul LIU Crystal–less jitter attenuator Generates DSX–1 and CSU line build outs

Characteristics-100W

Contextual Info: DS26502 T1/E1/J1/64KCC BITS Element www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26502 is a building-integrated timingsupply BITS clock-recovery element. The receiver portion can recover a clock from T1, E1, 64kHz composite clock, and 6312kHz synchronization timing interfaces. In T1 and E1

Contextual Info: DS26503 T1/E1/J1 BITS Element www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26503 is a building-integrated timingsupply BITS clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1, E1, and 6312kHz synchronization timing

Contextual Info: DESIGN KIT AVAILABLE DS26503 T1/E1/J1 BITS Element www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26503 is a building-integrated timingsupply BITS clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1,

Contextual Info: DS26519 16-Port T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26519 is a single-chip 16-port framer and line interface unit LIU combination for T1, E1, and J1 applications. Each port is independently configurable, supporting both long-haul and short-haul lines. The

Contextual Info: DESIGN KIT AVAILABLE DS26502 T1/E1/J1/64KCC BITS Element www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26502 is a building-integrated timingsupply BITS clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1,

DS2155

Abstract: DS21Q55 DS21Q55N
Contextual Info: DS21Q55 Quad T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS21Q55 is a quad software-selectable T1, E1, or J1 MCM device for short-haul and long-haul applications. Each port is composed of a line interface unit LIU , framer, HDLC controllers, and a

dallas semiconductor IC DS 1242

Abstract: 063a st rcc23 RG703 BUS34 bel 1515 hybrid ic Motorola LSC microcontroller mps 0514 MPS 0713 P/LM 1709 cb
Contextual Info: DS26556 4-Port Cell/Packet Over T1/E1/J1 Transceiver www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS26556 is a quad, software-selectable T1, E1, or J1 transceiver with a cell/packet/TDM interface. It is composed of four framer/formatters + LIUs, and a UTOPIA cell , POS-PHY