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    FLIP FLOP DIP Search Results

    FLIP FLOP DIP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TC4013BP
    Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, D-Type Flip-Flop, DIP14 Datasheet
    9001DM/B
    Rochester Electronics LLC 9001 - Flip-Flop/Latch PDF Buy
    74ACT11175DW
    Rochester Electronics LLC 74ACT11175 - D Flip-Flop PDF Buy
    54F175/B2A
    Rochester Electronics LLC 54F175 - Quad D Flip-Flop PDF Buy
    9022DC
    Rochester Electronics LLC 9022 - Dual JK Flip Flops PDF Buy

    FLIP FLOP DIP Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: 54ACT534 54ACT534 Octal D Flip-Flop with TRI-STATE Outputs Literature Number: SNOS108 54ACT534 Octal D Flip-Flop with TRI-STATE Outputs General Description The ’ACT534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop


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    54ACT534 54ACT534 SNOS108 ACT534 ACT374 PDF

    ECL 10131

    Abstract: signetics 10131 10131dc 10131N 10131F 25CC C30C62
    Contextual Info: S ignetics 10131 Flip-Flop Dual D-Type Master-Slave Flip-Flop Product Specification ECL Products DESCRIPTION The 10131 is a Dual Master-Slave Flip­ Flop. Each flip-flop can be clocked sepa­ rately by holding the common Clock in the LOW state and using the Clock


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    10131N 10131F 1110mV ECL 10131 signetics 10131 10131dc 10131N 10131F 25CC C30C62 PDF

    54AC175

    Contextual Info: 54AC175,54ACT175 54AC175, 54ACT175 Quad D Flip-Flop Literature Number: SNOS094A July 29, 2011 54AC175 54ACT175 Quad D Flip-Flop General Description Features The 'AC/'ACT175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and


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    54AC175 54ACT175 54AC175, 54ACT175 SNOS094A 54AC175 ACT175 PDF

    CD40174BC

    Abstract: CD40174BCM CD40174BCN CD40175BC CD40175BCM CD40175BCN MC14174B MC14175B MM74C174 MM74C175
    Contextual Info: Revised January 1999 CD40174BC CD40175BC Hex D-Type Flip-Flop • Quad D-Type Flip-Flop General Description The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positiveedge triggered D-type flip-flops; both the true and complement outputs from each flip-flop are externally available.


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    CD40174BC CD40175BC CD40174BC CD40175BC CD40174BCM CD40174BCN CD40175BCM CD40175BCN MC14174B MC14175B MM74C174 MM74C175 PDF

    54AC374

    Contextual Info: 54AC374,54ACT374 54AC374 54ACT374 Octal D Flip-Flop with TRI-STATE Outputs Literature Number: SNOS105 54AC374 54ACT374 Octal D Flip-Flop with TRI-STATE Outputs General Description The ’AC/’ACT374 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop


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    54AC374 54ACT374 54ACT374 SNOS105 54AC374 ACT374 PDF

    Contextual Info: 54FCT374 54FCT374 Octal D-Type Flip-Flop with -TRISTATE Outputs Literature Number: SNOS428 54FCT374 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’FCT374 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for


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    54FCT374 54FCT374 SNOS428 FCT374 PDF

    74F175

    Abstract: 54f175dm
    Contextual Info: 54F175,74F175 54F175 74F175 Quad D Flip-Flop Literature Number: SNOS163A 54F 74F175 Quad D Flip-Flop General Description Features The ’F175 is a high-speed quad D flip-flop The device is useful for general flip-flop requirements where clock and clear inputs are common The information on the D inputs is


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    54F175 74F175 74F175 SNOS163A 74F175PC/clocks 54f175dm PDF

    SN74LS74AM

    Abstract: SN74LS74A SN74LS74AD SN74LS74ADR2 SN74LS74AMEL SN74LS74AN typ25
    Contextual Info: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q


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    SN74LS74A SN74LS74A r14525 SN74LS74A/D SN74LS74AM SN74LS74AD SN74LS74ADR2 SN74LS74AMEL SN74LS74AN typ25 PDF

    Contextual Info: 54F534,74F534 54F534 74F534 Octal D-Type Flip-Flop with TRI-STATE RM Outputs Literature Number: SNOS201A 54F 74F534 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’F534 is a high speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and


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    54F534 74F534 74F534 SNOS201A PDF

    CD40174BCN

    Abstract: CD40174BC CD40174BCM CD40175BC CD40175BCM CD40175BCN MC14174B MC14175B MM74C174 MM74C175
    Contextual Info: Revised July 1999 CD40174BC CD40175BC Hex D-Type Flip-Flop • Quad D-Type Flip-Flop General Description Features The CD40174BC consists of six positive-edge triggered Dtype flip-flops; the true outputs from each flip-flop are externally available. The CD40175BC consists of four positiveedge triggered D-type flip-flops; both the true and complement outputs from each flip-flop are externally available.


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    CD40174BC CD40175BC CD40174BC CD40175BC CD40174BCN CD40174BCM CD40175BCM CD40175BCN MC14174B MC14175B MM74C174 MM74C175 PDF

    Contextual Info: 54F374 54F374 Octal D-Type Flip-Flop with TRI-STATE RM Outputs Literature Number: SNOS190 54F 74F374 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’F374 is a high-speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and


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    54F374 54F374 SNOS190 74F374 74F374PC PDF

    ECL 100151

    Abstract: 100151 PM710 100151F 100151Y
    Contextual Info: Signetics 100151 Flip-Flop Hex D-Type Master-Slave Flip-Flop Product Specification ECL Products DESCRIPTION The 100151 contains six flip-flops with complement and data outputs, a master reset MR and a pair of common clock inputs. Data enter the flip-flop on the


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    137mA 100151F 100151Y 740mVp-p 500ns ECL 100151 100151 PM710 100151F 100151Y PDF

    SN74LS74AN

    Abstract: SN74LS74A SN74LS74AD
    Contextual Info: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q


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    SN74LS74A SN74LS74A r14153 SN74LS74A/D SN74LS74AN SN74LS74AD PDF

    74ls175

    Abstract: 74ls175 pin diagram 74LS175 TTL LS175 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Contextual Info: SN54/74LS175 QUAD D FLIP-FLOP The LSTTL / MSI SN54 / 74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to HIGH clock transition. Both true and complemented outputs of each flip-flop


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    SN54/74LS175 74LS175 LS175 74ls175 pin diagram 74LS175 TTL SN54LSXXXJ SN74LSXXXD SN74LSXXXN PDF

    motorola 5331

    Abstract: 74ls175 pin diagram 74LS175 LS175 SN54LSXXXJ SN74LSXXXD SN74LSXXXN motorola ttl
    Contextual Info: SN54/74LS175 QUAD D FLIP-FLOP The LSTTL / MSI SN54 / 74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to HIGH clock transition. Both true and complemented outputs of each flip-flop


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    SN54/74LS175 74LS175 LS175 motorola 5331 74ls175 pin diagram SN54LSXXXJ SN74LSXXXD SN74LSXXXN motorola ttl PDF

    MM74C74N

    Abstract: AN-90 M14A MM74C74 MM74C74M MS-001 N14A
    Contextual Info: Revised January 1999 MM74C74 Dual D-Type Flip-Flop General Description • High noise immunity: The MM74C74 dual D-type flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors. Each flip-flop


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    MM74C74 MM74C74 MM74C74N AN-90 M14A MM74C74M MS-001 N14A PDF

    74107 pin diagram

    Abstract: CI 74107 74ls107 pin configuration 74LS107 TTL 74107 2RD22 74107 LS107 1N3064 1N916
    Contextual Info: Signetics 74107, LS107 Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION The ’107 is a dual flip-flop with individual J, K, Clock and direct Reset inputs. The 74107 is a positive pulse-triggered flip­ flop. JK information is loaded into the


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    LS107 74LS107 1N916, 1N3064, 500ns 74107 pin diagram CI 74107 pin configuration 74LS107 TTL 74107 2RD22 74107 LS107 1N3064 1N916 PDF

    ls378

    Abstract: 74LS377 74LS174 74LS175 74LS378 74LS379
    Contextual Info: SN54/74LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a


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    SN54/74LS377 SN54/74LS378 SN54/74LS379 74LS377 74LS378 74LS174, 74LS379 74LS175 74LS379 ls378 74LS174 PDF

    74AC

    Abstract: MC74AC534 MC74ACT534 motorola act374 ACT374 MOTOROLA
    Contextual Info: MC74AC534 MC74ACT534 Octal DĆType FlipĆFlop With 3ĆState Outputs OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS The MC74AC534/74ACT534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus


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    MC74AC534 MC74ACT534 MC74AC534/74ACT534 AC/ACT534 AC/ACT374 MC74AC534/D* MC74AC534/D 74AC MC74AC534 MC74ACT534 motorola act374 ACT374 MOTOROLA PDF

    AC374

    Abstract: ACT374 D1517
    Contextual Info: AVG Semiconductors DDi"1 Technical Data DV74AC374 DV74ACT374 DV74AC374 AvailaW Q 2 . 1995 Octal Non-inverting D-Type Flip-Flop with 3-State outputs N Suffix Plastic DIP AVG-005 Case The DV74AC374 and DV74ACT374 is an Octal Flip-Flop featuring separate D-type inputs for each flip-flop and


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    DV74AC374 DV74ACT374 DV74ACT374 AVG-005 AVG-006 ACT374 1-800-AVG-SEMI DV74AC374, AC374 ACT374 D1517 PDF

    Contextual Info: 54LS109 Signetics Flip-Flop Dual J-K Positive Edge-Triggered Flip-Flop Product Specification Military Logic Products DESCRIPTION The 54LS109 is a dual positive edge-trig­ gered JK-type flip-flop featuring individual J, K, Clock, Set and Reset inputs; also


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    54LS109 54LS109 54LSXXX 500ns S15ns 1N916 1N3064, PDF

    Contextual Info: Signetics 54F113 Flip-Flop Dual J-K Negative Edge-Triggered Flip-Flop Without Reset Product Specification Military Logic Products DESCRIPTION The 54F113 is a dual J-K negative edge-triggered flip-flop featuring indi­ vidual J, K, Set and Clock inputs. The


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    54F113 54F113 500ns PDF

    Contextual Info: 54AC574,54ACT574 54AC574 54ACT574 Octal D-Type Flip-Flop with TRI-STATE Outputs Literature Number: SNOS075 54AC574 54ACT574 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’AC/’ACT574 is a high-speed, low power octal flip-flop


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    54AC574 54ACT574 54ACT574 SNOS075 54AC574 ACT574 PDF

    Contextual Info: U1 National Semiconductor 54F/74F175 Quad D Flip-Flop General Description Features The ’F175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is


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    54F/74F175 74F175PC 54F175DM 74F175SC 74F175SJ PDF