FIGURE T23B Search Results

intel 82350

Abstract: intel 82352 82351 eisa intel 82357 intel 82358 82359 82350DT EISA Chip Set Design Guide 2LF 1418 82350DT
Contextual Info: in te i 82358DT EISA Bus Controller • Supports 82350 and 82350DT Chip Set Based Systems — Mode Selectable for Either 82350 or 82350DT Based Systems — Mode Defaults to 82350 Based Systems ■ Socket Compatible with the 82358 EISA Bus Controller ■ Provides EISA/ISA Bus Cycle

INTEL 8209

Abstract: T16C figure t23b t17e MSR29
Contextual Info: inte! 82 09 1A A 11.0 ELECTRICAL CHARACTERISTICS 11.1 Absolute Maximum Ratings Storage Temperature .-6 5 °C to + 150°C Supply Voltage. -0 .5 V to +8.0V Voltage on Any Input.G ND-2V to 6.5V

FE5000

Abstract: FE5020
Contextual Info: i S WESTERN D IG IT A L CORP H IE D FARADN *1710520 ODOblOS b • Advance Information A W estern D ig ita l Com pany FE5010 DMA and Channel Control Logic ■ ■ ■ ■ 100% Hardware Register Level and Software Compatible to the IBM* Personal System/2*

T23B

Abstract: figure t23b AB34 AN35 t19b T31B
Contextual Info: MII PROCESSOR Enhanced High Performance CPU  Advancing the Standards Electrical Specifications 4.0 ELECTRICAL SPECIFICATIONS 4.1 Electrical Connections This section provides information on electrical connections, absolute maximum ratings, recommended operating conditions, DC characteristics, and AC characteristics. All voltage

T23-26X2

Abstract: ST 4148
Contextual Info: POWER FACTOR CORRECTORS POWER MAGNETICS [ T23 -26X2 Series MAX. DIM : L = 96.52 mm W= 73.66 mm H = 86.36 mm Designed for use in off-line AC/-DC pre-regulators circuits for switching power converters applications. Low cores loss and high flux density. Auxiliary winding optional.

Contextual Info: V ¡e lu o m V Semiconductor, Inc. TC1275 TC1276 TC1277 3-PIN RESET MONITORS FOR 3.3V SYSTEMS FEATURES GENERAL DESCRIPTION • The TC1275, TC1276 and TC1277 are cost-effective system supervisor circuits designed to monitor VCc in digital systems and provide a reset signal to the host processor

A6321

Abstract: 82443BX A6319-01 a6320 AGP-66 A6317-01 T2D 17 67 MAB 311 273218-001
Contextual Info: 82443BX Host Bridge/Controller Electrical and Thermal Specification Timing Specification Datasheet Addendum Product Features • ■ ■ Processor/host bus support —Optimized for Pentium II processor at 100 MHz system bus frequency; Support for 66 MHz

440BX

Abstract: Diode T3D 57 t26b t2d t3d T3D 53 diode T3D 62 82443BX t2d 68 T13A T14A
Contextual Info: 82443BX Host Bridge/Controller Electrical and Thermal Specification Timing Specification Datasheet Addendum Product Features • ■ ■ Processor/host bus support —Optimized for Pentium II processor at 100 MHz system bus frequency; Support for 66 MHz

a6321

Abstract: MAB 311
Contextual Info: 82443BX Host Bridge/Controller Electrical and Thermal Specification Timing Specification Datasheet Addendum Product Features • ■ ■ Processor/host bus support —Optimized for Pentium II processor at 100 MHz system bus frequency; Support for 66 MHz

t44a

Abstract: 82358 29022 A 2232 intel localbus 386 386TM A82385 SES N 2405 386sx
Contextual Info: 82385SX HIGH P E R F O R M A N C E C A C H E C O N T R O L L E R Im proves 386 sx System Perform ance — Reduces Average CPU W ait States to Nearly Zero — Zero W ait State Read Hit — Zero W ait State Posted M em ory W rites — A llow s O ther M asters to Access the

300GP

Abstract: cyrix M 2 Processor CYRIX CORPORATION book national semiconductor ssd55 Cyrix 486
Contextual Info: &\UL[ 0,Œ '$7$%22. Š February 26, 1999 Updates for this manual can be obtained from Cyrix Web site: www.cyrix.com. 1998 Copyright Cyrix Corporation. All rights reserved. Printed in the United States of America Trademark Acknowledgments: Cyrix is a registered trademark of Cyrix Corporation.

386SX

Abstract: 82385SX t23b 82358 82385 t44a 387SX SA9C a82385 intel 386 SX LP
Contextual Info: in te i 82385SX HIGH PERFORMANCE CACHE CONTROLLER Im proves 386 SX System Perform ance — Reduces A verage CPU W ait States to Nearly Zero — Zero W ait State Read Hit — Zero W ait State Posted Mem ory W rites — Allows O ther Masters to Access the

cyrix 486

Abstract: ibm 6X86 8086 opcode of mov ax,bx CHIPset for 80286
Contextual Info:  IBM 6X86MX Microprocessor Databook Introduction NOTICE TO CUSTOMERS: Some of the information contained in this document was obtained through a third party and IBM has not conducted independent tests of all product characteristics contained herein. The product described in this document is sold under IBM’s standard warranty.

82430LX

Abstract: 82433NX T23B 50t34 SD1618 82434NX 82433LX Intel 82430 SD3055 t2d 76 diode value
Contextual Info: 82433LX 82433NX LOCAL BUS ACCELERATOR LBX Y Supports the Full 64-bit Pentium Processor Data Bus at Frequencies up to 66 MHz (82433LX and 82433NX) Y Dual-Port Architecture Allows Concurrent Operations on the Host and PCI Buses Y Drives 3 3V Signal Levels on the CPU

82335

Abstract: intel 82230 386sx
Contextual Info: in te i 82335 SX HIGH-INTEGRATION INTERFACE DEVICE FOR 386 SX MICROPROCESSOR BASED PC-AT SYSTEMS • ■ O p e ra te s w ith th e 8 2 2 3 0 an d 82231 to P ro v id e 10 0% IBM A T t m C o m p a tib ility ■ 3 8 7 TM S X N u m e ric C o p ro c e s s o r

A82385

Contextual Info: 82385 HIGH PERFORMANCE 32-BIT CACHE CONTROLLER • Improves 386 DX System Performance — Reduces Average CPU Wait States to Nearly Zero — Zero Wait State Read Hit — Zero Wait State Posted Memory Writes — Allows Other Masters to Access the System Bus More Readily

UT1553

Abstract: Mil-STD-1773 RTMP-10
Contextual Info: UT1553 Remote Terminal Multi-Protocol FEATURES INTRODUCTION p Complete MIL-STD-1553 Remote Terminal Interface p Mode selectable to comply with either MIL-STD- The UT1553 RTMP figures 1 and 4 is a monolithic, CMOS, VLSI integrated circuit that meets all requirements

Contextual Info: V LeJ£°Hk TC1273 TC1274 3-PIN RESET MONITORS FOR 5V SYSTEMS GENERAL DESCRIPTION FEATURES Precision Vcc Monitor for 5.0V Systems System Supplies 100 msec Guaranteed Minimum RESET, RESET Output Duration Output Guaranteed to Vcc = 1-2V Vcc Transient Immunity

MIL-STD-1773

Abstract: ST26A T23B t23j t22i 1553B UT1553 st23b D1083
Contextual Info: UT1553 Remote Terminal Multi-Protocol F EATURES INTRODUCTION p Complete MIL-STD-1553 Remote Terminal Interface p Mode selectable to comply with either MIL-STD- The UT1553 RTMP figures 1 and 4 is a monolithic, CMOS, VLSI integrated circuit that meets all requirements

82335

Abstract: intel 82230
Contextual Info: in te i 82335 SX HIGH-INTEGRATION INTERFACE DEVICE FOR 386 SX MICROPROCESSOR BASED PC-AT SYSTEMS • Operates with the 8 2 2 3 0 and 8 2 2 3 1 to Provide 1 0 0 % IBM ATtm Compatibility ■ ■ Optimized for 16 MHz and 2 0 MHz SX Microprocessor Based PC-AT

t41b mos

Abstract: hst 1025 pinout BNC -rj45 "aui transformers" HYUNDAI car BNC TO RJ45 WIRING diagram t187 82595TX convertor T175 M-TRON HC49
Contextual Info: 82595TX ISA PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Y Y Optimal Integration for Lowest Cost Solution Glueless 8-Bit 16-Bit ISA PCMCIA 2 0 Bus Interface Provides Fully 802 3 Compliant AUI and TPE Serial Interface Local DRAM Support up to 64 Kbytes FLASH EPROM Boot Support up to

T23-26X1

Abstract: 8849 ST ST 4148 paper phenolic PCB
Contextual Info: POWER FACTOR CORRECTORS POWER MAGNETICS [ T23 -26X1 Series MAX. DIM : L = 72.64 mm W= 68.58 mm H = 71.12 mm Designed for use in off-line AC/-DC pre-regulators circuits for switching power converters applications. Low cores loss and high flux density. Auxiliary winding optional.

T46A

Abstract: hst 1025 t187 t41b mos 82595TX P996 SA10 SA11 SA14 SA15
Contextual Info: 82595TX ISA PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Y Y Optimal Integration for Lowest Cost Solution Glueless 8-Bit 16-Bit ISA PCMCIA 2 0 Bus Interface Provides Fully 802 3 Compliant AUI and TPE Serial Interface Local DRAM Support up to 64 Kbytes FLASH EPROM Boot Support up to

CONDITIONS31

Abstract: B1274 1553B UT1553 what about 1553 bus
Contextual Info: UT1553 Remote Terminal Multi-Protocol FEATURES INTRODUCTION ❐ Complete VLSI MIL-STD-1553 Remote Terminal The UT1553 RTMP figures 1 and 4 is a monolithic, CMOS, VLSI integrated circuit that meets all requirements for a dual-redundant MIL-STD-1553 Remote Terminal