FIDL Search Results

BCI motor

Contextual Info: ebm-papst Automotive & Drives UK Ltd. Fidlers Lane, East Ilsley Berkshire RG20 7LG Phone 08707 665-170 Fax 08707 665-180 A&Dsales@uk.ebmpapst.com www.ebmpapst-ad.com Driving Great Britain The engineer’s choice BCI for Great Britain DC-motors move your country

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UT30P04 Preliminary Power MOSFET P-CHANNEL LOGIC LEVEL ENHANCEMENT MODE FIDLD EFFECT TRANSISTOR „ DESCRIPTION The UTC UT30P04 is a P-channel enhancement mode Power MOSFET, providing customers fast switching, ruggedized device

Contextual Info: 0ns TITLE 50ns 100ns 150ns 200ns PLX SGS PCI MPEG, FIFO DMA READ [FIFODMA.TD] 06/19/95 CLK25 [3,14] [3,14] LA[1.31], LBE,UBE [6,18] [6,18] ADS~ [6,18] [6,18] [3,18] [3,18] DACK0~ LW/R [5,16] [5,16] BLAST~ [4,10] FIFO STATE FIDLE [4,10] F5 FIDLE F7 [4,10]

Diode F6

Abstract: f6 diode
Contextual Info: 0ns TITLE 50ns 100ns 150ns PLX SGS PCI MPEG, FIFO READ [FIFORD.TD] 05/27/95 CLK25 [3,14] [3,14] LA[1.31], LBE,UBE [6,18] [6,18] ADS~ [3,18] [3,18] LW/R [5,16] [5,16] BLAST~ [4,10] FIFO STATE FIDLE [4,10] F5 [4,10] FIDLE F6 [4,10] FIFOREN~ [4,10] [4,10]

Diode F6

Contextual Info: 0ns TITLE 50ns 100ns 150ns 200ns PLX SGS PCI MPEG, FIFO READ WITH PREFETCH [FIFORDPF.TD] 06/19/95 CLK25 [3,14] [3,14] LA[1.31], LBE,UBE [6,18] [6,18] ADS~ [3,18] [3,18] LW/R [5,16] [5,16] BLAST~ [4,10] FIFO STATE FIDLE [4,10] F5 FIDLE F6 [4,10] [4,10] FIFORENS~

40N04

Abstract: 40n0
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UT40N04 Preliminary Power MOSFET N-CHANNEL LOGIC LEVEL ENHANCEMENT MODE FIDLD EFFECT TRANSISTOR „ DESCRIPTION The UTC 40N04 is an N-channel enhancement mode FET using advanced technology to provide fast switching speed, ruggedized

PE-64352

Abstract: LT 7506 PE64352
Contextual Info: SN75061 DRIVER/RECEIVER PAIR WITH SQUELCH D 2 9 5 9 . JA N U A R Y 1 9 8 7 - REVISED JU LY 1 9 9 0 • IEEE 8 0 2 .3 1BASE5 Driver and Receiver • On-Chip Receiver Squelch w ith Adjustable Threshold N P AC K A G E ITO P V IE W D R D LA J£ 1 Adjustable Squelch Delay

MC 4011 BCP

Abstract: PKT 4113 API ncp 6131 SWITCHING SYSTEMS INTERNATIONAL sqm 225 leach 1522 her 4541 MSP SNCP t 1451 n 52 toh SWITCHING SYSTEMS INTERNATIONAL sqm 350 k2400 EQUIVALENT
Contextual Info: EtherPHAST -24 Device 2x OC-12/STM-4 SONET/SDH Ethernet Mapper TXC-06745 DATA SHEET TXC-06745-MB, Ed. 2 February 2006 FEATURES APPLICATIONS • Client Interfaces: 2x GMII/24x SMII/4x TBI/MPI 24 channel packet all pin shared • Two serial Gigabit Ethernet (1.25 Gbit/s) ports with integrated CRSU/SerDes (8B/10B)

Contextual Info: A B W A N O B O N IP O R Q W O Q N in te i 82091AA ADVANCED INTEGRATED PERIPHERAL AIP • Single-Chip PC Compatible I/O Solution for Notebook and Desktop Platforms: — 82078 Floppy Disk Controller Core — Two 16550 Compatible UARTs — One Multi-Function Parallel Port

energy tapping identifier wireless data acquisition

Abstract: interpolation CIC Filter iso 7811-9 sine wave pwm circuit pec 4179 Isdi cmos sensor edp 2339 ARM926EJ atmel sam4l ram schematic diagram
Contextual Info: Features • Core • • • • – ARM CortexTM-M4 running at up to 48 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set picoPower® Technology for Ultra-low Power Consumption – Active mode downto 90µA/MHz with configurable voltage scaling

T32A scr

Abstract: t17c floppy controller pinout Intel 82072 intel floppy disk controller 8272 82091AA T16E 82077AA 82077SL SA10
Contextual Info: 82091AA ADVANCED INTEGRATED PERIPHERAL AIP Y Single-Chip PC Compatible I O Solution for Notebook and Desktop Platforms 82078 Floppy Disk Controller Core Two 16550 Compatible UARTs One Multi-Function Parallel Port IDE Interface Integrated Back Power Protection

n117

Contextual Info: DS3F Device DS3 Framer TXC-03401B DATA SHEET • DS3 payload access, bit-serial or nibble-parallel • C-bit parity or M13 operating mode • C-bit interface 13 C-bits in, 14 out • Detect and generate DS3 AIS, and idle signals • Transmit reference generator for serial operation

LB28

Abstract: S200F
Contextual Info: ^ ls W j i i V lff f g / f | M13E Device DS3/DS1 MUX/DEMUX, Extended Features TXC-03303 DATA SHEET FEATURES DESCRIPTION • Multiplexes/demultiplexes 28 DS1 signals to/from a DS3 signal. The M13E CMOS VLSI device provides the functions needed to multiplex and demultiplex 28 independent DS1

ior e78996

Abstract: E78996 ior
Contextual Info: INTERNATIONAL RECTIFIER bSE » WÊ 4055452 DDlbBll T3T • INR Bulletin E27111 International ^ 1 Rectifier IRFK6H250,IRFK6J250 Isolated Base Power HEX-pak Assembly - Parallel Chip Configuration • • • • High Current Capability. UL recognised E78996.

2m137

Contextual Info: MT90733 CM OS @ DS3 Framer DS3F MITEL Preliminary Information Features ISSUE 3_ January 1996 M aps broadband payloads in the DS3 form at O rdering Inform ation DS3 payload access in eith er bit-serial or n ibble-parallel m ode MT90733AP 68 Pin PLCC

UPD6452CS-002

Abstract: upd6452 GT102
Contextual Info: b 4 2 7 5 2 5 D D M T 7 7 0 Û4b « N E C E MOS INTEGRATED CIR CU IT /¿PD6452 12 LIN E X 2 4 C O L U M N O N - S C R E E N C H A R A C T E R D IS P L A Y C M O S LSI FOR S-V CR DESCRIPTION The ¿ PD6452 is on-screen character display CMOS LSI which is combined with microcomputers and used for S-VCR to

Contextual Info: M 13E D evice DS3/DS1 MUX/DEMUX, Extended Features TXC-03303 DATA SHEET Preliminary .— = • Multiplexes/demultiplexes 28 DS1 signals into a DS3 signal. • M13 or C-bit parity mode operation • FEBE, C, or P-bit parity error insertion capability

Contextual Info: REVISION B SADL-XX-XX- -xx.xx-xx NOTES: 1. REPRESENTS A CRITICAL DIMENSION. 2. ALL DIMENSIONS TO BE SYMMETRICAL ABOUT CENTERLINE WITHIN±.002[.05] UNLESS OTHERWISESTATED. 3. PARTS TO BE RoHS COMPLIANT 4. PARTS TO BE LAYER PACKAGED IN FOAM 5. IMPEDANCE TO BE 50 OHMS FOR THE -SE AND 100 OHMS

N7013

Abstract: dr25 diode specifications Digital Alarm Clock by using ttl dr25 diode datasheet DSX-3 lb20 CR18 CT28 DT28 MT90737
Contextual Info: CMOS MT90737 DS3/DS1 MUX/DEMUX M13  Preliminary Information Features • • • • • • • • • • • • ISSUE 1 Multiplexes/demultiplexes 28 DS1 signals to/from a DS3 signal Selectable M13 or C-bit parity mode Separate interface for C-bits

Contextual Info: Pr o d u c t S p e c if ic a tio n i£ > Z iIf ìG Z16C33 CMOS MUSC m o n o - u n iv e r s a l S e r ia l c o n t r o l l e r FEATURES • 0 to 10 M bit/sec, full-duplex channel, with two baud rate generators and a digital phase-locked loop for clock recovery.

Contextual Info: CMOS MT90733 g l M DS3 Framer (DS3F IT E L Preliminary Information Features ISSUE 3 • Maps broadband payloads in the DS3 format • DS3 payload access in either bit-serial or nibble-parallel mode • C-bit parity or M13 operating mode • Separate interface for C-bits

Contextual Info: <£ZiIi3G Pr elim in a ry Pro d u ct Spec ifica tio n Z85230 ESCC E n h a n c e d S e r ia l C o m m u n ic a t io n C o n t r o l l e r FEATURES Deeper Data FIFOs - 4-byte transmit FIFO - 8-byte receive FIFO • Low Power CMOS ■ New program m able features added with Write

Contextual Info: P r e l im in a r y P r o d u c t Sp e c if ic a t io n Z80189/Z8L189 G e n e r a l -P u r p o s e Em b e d d e d C o n t r o l l e r s FEATURES Part CPU UART I/O Speed MHz Z 801 89 S180* 16550 24 33 Z 8L1 89 S180* 16550 24 20 • Fully Static Z180 MPU Core*

4LC1M16E5

Abstract: 4C1M16E5 j13000 j130007a 1m16e 4C1M16E5-60 J1-30007-A as4c1m16e5 4lc1m16e5-60 AS4LC1M16E5
Contextual Info: H ig h P e rfo rm a n c e l M x 16 CM OS DRAM » H A S4C1M 16E5 AS4LC1M 16E5 A l M x 16 CM OS EDO DRAM Preliminary information Features • Organization: 1,048,576 words x 16 bits • High speed • 1 0 2 4 re fre sh cycles, 16 m s re fre sh in te rv a l - RAS-only or CAS-before-RAS refresh