F10Q Search Results

Contextual Info: NATIONAL SEMICOND LOGIC 31E D b501122 0071Q71 2 I 100114 rr\ National ÆjA Semiconductor F100114 Quint Differential Line Receiver General Description The F10Q114 is a monolithic quint differential line receiver with emitter-foilower outputs. An internal reference supply

Contextual Info: <o> ai 1m CmC i m w lC m m m •v i 00 S 304 “-.j U I N î AimD' N A N D i j A î E ^JSS W S E M /C O N D U C T O P m ssM FEA TU R E S The SY100S304 is an ultra-fast quint AND/NAND gate designed for use in high-performance ECL systems. This device also features a Function F output which is the wireNOR of the AND gate outputs. The inputs on the device

Contextual Info: F100183 2 x 8-Bit Recode Multiplier F A IR C H IL D A S c h lu m b e rg e r C o m p a n y F100K ECL Product Description The F100183 is a 2 x 8-bit recode multiplier designed to perform high-speed hardware multiplication. In conjunction with the F100182 Wallace Tree Adder, the

F100179

Abstract: F100180 F100182 F100183 987510 5 bit binary multiplier using adders
Contextual Info: E g National æ ü Semiconductor F100183 2 x 8-Bit Recode Multiplier General Description The F100183 is a 2 x 8 -bit recode multiplier designed to perform high-speed hardware multiplication. In conjunction with the F100182 Wallace Tree Adder, the F100179 Carry

F100415

Abstract: BIT 3195
Contextual Info: F100415 1024 x 1-Bit Static Random Access Memory FAIRCHILD A Schlumberger Company F100K ECL Product Description The F100415 is a 1024-bit read/write Random Access Memory RAM , organized as 1024 words by one bit per word and designed for high-speed scratchpad, control

Contextual Info: F100179 Carry Lookahead Generator F100K ECL Product Description The F100179 is a high-speed Carry Lookahead Generator intended fo r use with the F100180 6-bit fast Adder and the F100181 4-bit ALU. Connection Diagrams 24-Pin DIP Top View PC Pin Names Cn früi

K11-R

Abstract: K9f* 2010 F9E4 k11r d10e1 M1S5 E5G4
Contextual Info: 13 12 10 0.80 • 0.80 1.40 1.40 - ADD FO R E N D W A L L PIN A1 \ 22.95 28.9 28.9 (.30 - K E E P - O U T ZONE s. I I 6X 2.30 6X (ADD FO R E N D W A L L ) ROW ROW ROW ROW ROW ROW ROW ROW ROW ROW ROW ROW ROW ROW ROW ROW ROW ROW J 2.55 o o o 4.05

ECL Decade Counter

Contextual Info: F10010 • F10016 BCD DECADE COUNTER/4-BIT BINARY COUNTER GENERAL DESCRIPTION — The F10010 is a high-speed synchronous, presettable, cascadable BCD Decade Counter and the F10016 is a high-speed synchronous, pre­ settable, cascadable 4-Bit Binary Counter. They are m ultifunction MSI building

TCA965 equivalent

Abstract: ULN2283 capacitor 473j 100n UAF771 transistor GDV 65A pbd352303 cm2716 TAA2761 TAA4761 ULN2401
Contextual Info: veryimpressivePrice. power drain. For the same low price astheTTL-compatible DG211. Very Impressive Performance. Low power, low source-drain ON resistance, low switching times, low current, low price. It all adds up to superstar performance for portable and battery-operated

ITT 7400

Abstract: IC TTL 7400 ITT301 7400 signetics TTL B245 CD 8227 rb1-e N74LS04 b123 N74LS01N
Contextual Info: Signetics Integrated Circuits - Low Power Schottky T T L 74LS Series — Low Power Schottky TT L IN T R O D U C T IO N L o w P o w e r S c h o t tk y T T L o ffe r:; th e sam e speed as S ta n d a rd T T L a t 1 /5 th e p o w e r. T h e p o w e r savings and

Contextual Info: National ÆA Semiconductor F100182 9-Bit Wallace Tree Adder General Description The F100182 is a 9-bi1 W allace tree adder. It is designed to assist in perform ing high-speed hardware m ultiplication. The device is designed to add 9 bits of data 1-bit-slice w ide and

MOA8

Abstract: P1A10 b1t11 C9-E11 F4F4 C3P11 L11-R8 k5m6 k4p6 a4p12
Contextual Info: 13 12 10 1 /0 FOR E N D W A L L K E E P - O U T ZO N E 0 0 10| S E E CHART 18 H O LE S P E R COLUMN) 28.6 1.95 NOTES: 1. M ATERIALS: HOUSING - LIQUID C RYSTAL POLYNER (LCP) GLASS-HILLED, UL94V-0 TERNINALS - HIGH PERRORNANCE COPPPR ALLOY 2. PINISH: 30A NIN GOLD IN CONTACT ARPA.

100158DC

Contextual Info: 100158 O T National dim Semiconductor F100158 8-Bit Shift Matrix General Description The F100158 contains a combinatorial network which per­ forms the function of an 8 -bit shift matrix. Three control lines Sn are internally decoded and define the number of places